Image sensor having separate, stacked, pixel array, DRAM, and logic/analog-digital converter integrated circuit die

A method comprising:

• receiving an image onto an array pixel IC, the array pixel IC having an array of pixels divided into a plurality of sub-arrays of pixels;
• capturing the image as image data in pixels of the sub-arrays of pixels, where each sub-array is coupled to a separate, associated, analog-to-digital converter of a plurality of analog to digital converters through at least one inter-die bond, the analog to digital converters located on a logic IC;
• scanning the sub-arrays of pixels and reading the image data from pixels of the sub-arrays into the associated analog-to-digital converters and converting the image data to digital image data;
• reading a one-time-programmable (OTP) memory on a dynamic RAM (DRAM) IC separate from the array pixel IC and the logic IC to determine a mapping of bad cells in a dynamic random-access memory (DRAM) located on the DRAM IC;
• transferring the digital image data over inter-die bonds and buffering the digital image data in the DRAM;
• reading the OTP memory, and buffering data from the OTP memory on the DRAM IC, to obtain a mapping of bad pixels in the array of pixels on the array pixel IC and providing the mapping of bad pixels to imaging processing circuitry on the logic IC;
• and reading the digital image data from the DRAM on the DRAM IC over inter-die bonds into the image processing circuitry on the logic IC and performing image processing.