Semiconductor device, inverter, and automobile

A semiconductor device comprising:

• first and second switching devices connected in series between a first potential and a second potential lower than the first potential to operate complementarily;
• a first gate driving circuit that performs driving control of the first switching device;
• a second gate driving circuit that performs driving control of the second switching device:
• a first status-detection circuit having functions of not only detecting whether the first switching device is in turn-off operation to output a result of the detection as a first status signal, but also generating a dead time of on-off operation of each of the first and second switching devices;
• a second status-detection circuit having functions of not only detecting whether the second switching device is in turn-off operation to output a result of the detection as a second status signal, but also generating a dead time of on-off operation of each of the first and second switching devices;
• first and second input terminals to which first and second on-off command signals for turning on and off the first and second switching devices are input, respectively;
• a first logic circuit that receives the first on-off command signal and the second status signal, and that outputs the first on-off command signal as a signal for turning on the first switching device only when the second status signal indicates that the second switching device is not in turn-off operation;
• a second logic circuit that receives the second on-off command signal and the first status signal, and that outputs the second on-off command signal as a signal for turning on the second switching device only when the first status signal indicates that the first switching device is not in turn-off operation,
• wherein
• the first status-detection circuit includes
• a first comparator that compares a gate voltage of the first switching device with a predetermined first reference voltage, and
• a third logic circuit that receives a first inversion signal generated by inverting the first on-off command signal and an output signal of the first comparator, and that outputs the first status signal indicating that the first switching device is in turn-off operation in a period satisfying the following conditions:
• the first inversion signal is a signal for turning off the first switching device;
• and the first switching device has a gate voltage higher than the first reference voltage,
• the second status-detection circuit includes
• a second comparator that compares a gate voltage of the second switching device with a predetermined second reference voltage, and
• a fourth logic circuit that receives a second inversion signal generated by inverting the second on-off command signal and an output signal of the second comparator, and that outputs the second status signal indicating that the second switching device is in turn-off operation in a period satisfying the following conditions:
• the second inversion signal is a signal for turning off the second switching device;
• and the second switching device has a gate voltage higher than the second reference voltage.