PWM controlled analog signal
AssigneeDialog Semiconductor (UK) Limited
InventorsKeisuke Kadowaki, Naoyuki Unno, Hiromitsu Aoyama
Life of this patent
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Abstract
A voltage proportional to a pulse width modulation (PWM) duty cycle is generated, using a low pass filter (LPF). A 2nd or higher order LPF is provided, giving a 90×(2n+1) degree phase shift for (n=0, 1, 2, . . . ), so that the sampling timing at the latter stages can be at the rising and/or falling edge of the PWM input signal. A switched capacitor circuit after the 2nd or higher order LPF is provided, removing a voltage ripple on an LPF output, and using a smaller device area.
Claims20
A circuit for generating a pulse width modulation (PWM) controlled analog signal, comprising:
- a buffer, configured to receive a PWM input signal;
- a low pass filter (LPF), connected to a buffer output, configured to remove a voltage ripple on an LPF output, the LPF comprising:
- a 2nd or higher order LPF;
- and
- a first switched capacitor (SC) circuit, connected to the LPF output, configured to remove a remaining voltage ripple, and to output the PWM controlled analog signal, wherein
- a first sampling operation is configured at a falling edge of the PWM input signal, when a first switch is configured to open and a second switch is configured to close.
A method for generating a pulse width modulation (PWM) controlled analog signal, comprising:
- generating a voltage proportional to a duty cycle of a pulse width modulation (PWM) input signal, using a low pass filter (LPF),
- wherein the LPF is a 2nd or higher order LPF;
- sampling an output of the LPF at a falling and/or rising edge of the PWM input signal, when a first switch is configured to open and a second switch is configured to close;
- and
- removing a voltage ripple on the output of the LPF, using a first switched capacitor circuit.
Dependencies are inferred from the claim text.