US 10,833,663 B2Granted

Circuits with low-pass filters and differential amplifiers

AssigneeTexas Instruments Incorported

InventorsMichael Schultz, Robert Callaghan Taft

Life of this patent

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Abstract

A circuit comprises a first set of serially-connected inverters comprising an input port, the first set of serially-connected inverters comprising a first subset of serially-connected inverters, the first subset of serially-connected inverters odd in number and comprising an input port and an output port; a first low-pass filter comprising an input port coupled to the output port of the first subset of serially-connected inverters, and an output port; a second low-pass filter comprising an input port coupled to the input port of the first subset of serially-connected inverters, and an output port; and a first differential amplifier comprising a first input port coupled to output port of the first low-pass filter, a second input port coupled to the output port of the second low-pass filter, and an output port coupled to the input port of the first set of serially-connected inverters.

Claims2

Dependent claims

A circuit comprising:

a first clock signal input port;
a first inverter having an input port coupled to the first clock signal input port, and an output port;
a second inverter having an input port coupled to the output port of the first inverter, and an output port;
a third inverter having an input port coupled to the output port of the second inverter, and an output port;
a fourth inverter having an input port coupled to the output port of the third inverter, and an output port;
a first low-pass filter having an input port coupled to the output port of the third inverter, and an output port;
a second low-pass filter having an input port coupled to the output port of the fourth inverter, and an output port;
and
a first differential amplifier having a first input port coupled to the output port of the first low-pass filter, a second input port coupled to the output port of the second low-pass filter, an output port coupled to the input port of the first inverter, and a capacitor having a first terminal connected to the first input port and a second terminal connected to the output port.

6 more elements

Dependencies are inferred from the claim text.

Facts

Application: 16/509,526Filed 12 Jul 2019 · continuation
Priority: 13 Apr 2017
Published: US 2019/0341915 A17 Nov 2019
Granted: 10 Nov 2020
Term ends: Not estimatedThe source records don’t support an estimate.

Classification4 codes

H03K 5/1565
Arrangements in which a continuous pulse train is transformed into a train having a desired pattern: the output pulses having a constant duty cycle
H03K 5/04
Shaping pulses: by increasing duration; by decreasing duration
H03K 5/135
Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals: by the use of time reference…
H03K
Pulse technique

Family

Application62/485,345Us provisional application · filed 13 Apr 2017
Application15/951,973Parent of this continuation · filed 12 Apr 2018
US 2019/0341915 A1Pre-grant publication · published 7 Nov 2019
US 10,396,768 B2Parent of this continuation
US 2018/0302075 A1Published application
US 10,833,663 B2This patent

From the US filing history. Foreign family members aren’t listed.