Substantially defect free relaxed heterogeneous semiconductor fins on bulk substrates
AssigneeInternational Business Machines Corporation
InventorsVeeraraghavan S. Basker, Oleg Gluschenkov, Shogo Mochizuki, Alexander Reznicek
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Abstract
A semiconductor structure is provided that includes a bulk semiconductor substrate of a first semiconductor material. The structure further includes a plurality of fin pedestal structures of a second semiconductor material located on the bulk semiconductor substrate of the first semiconductor material, wherein the second semiconductor material is different from the first semiconductor material. In accordance with the present application, each fin pedestal structure includes a pair of spaced apart semiconductor fins of the second semiconductor material.
Claims20
A method of forming a semiconductor structure, the method comprising:
- providing a plurality of first semiconductor fins on a bulk semiconductor substrate, wherein each first semiconductor fin and the bulk semiconductor substrate comprise a first semiconductor material;
- forming a conformal layer of a second semiconductor material that differs from the first semiconductor material on physically exposed surfaces of the first semiconductor fins and the bulk semiconductor substrate;
- forming a first dielectric material on the conformal layer;
- removing an upper portion of the first dielectric material and a portion of the conformal layer that is present on a topmost surface of each first semiconductor fin to provide a first dielectric material portion and a plurality of second semiconductor fins of the second semiconductor material;
- removing an entirety of each first semiconductor fin to physically expose a topmost surface of the bulk semiconductor substrate, wherein the physically exposed topmost surface of the bulk semiconductor substrate is coplanar with a bottommost surface of each second semiconductor fin of the plurality of second semiconductor fins;
- forming a second dielectric material portion directly on the physically exposed topmost surface of the bulk semiconductor substrate, wherein the second dielectric material portion has a topmost surface that is coplanar with a topmost surface of the first dielectric material portion and each second semiconductor fin;
- and
- recessing the first and second dielectric material portions to expose an upper portion of each second semiconductor fin.
Dependencies are inferred from the claim text.