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US 10,833,180 B2Granted
Self-aligned tunneling field effect transistors
AssigneeInternational Business Machines Corporation
InventorsYi Song, Junli Wang, Chi-Chun Liu, Liying Jiang
Life of this patent
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Abstract
Semiconductor devices and methods of forming the same include forming a doped drain structure having a first conductivity type on sidewalls of an intrinsic channel layer. An opening is etched in a middle of the channel layer. A doped source structure is formed having a second conductivity type in the opening of the channel layer.
Claims20
A method of forming a semiconductor device, comprising:
- forming a doped drain structure having a first conductivity type on sidewalls of an intrinsic channel layer;
- forming mandrel sidewalls over a dummy gate layer;
- forming a dummy gate from the dummy gate layer, using the mandrel sidewalls as a mask, the dummy gate having a central opening that exposes a portion of the channel layer;
- forming an opening in a middle of the channel layer after forming the doped drain structure, using the dummy gate as a mask;
- forming a doped source structure having a second conductivity type in the opening of the channel layer.
2 more elements
A method of forming a semiconductor device, comprising:
- forming a first masking structure over a layer of indium gallium arsenide, the masking structure including a dummy gate layer and spacer structures over the dummy gate layer;
- etching the layer of indium gallium arsenide to remove material around the masking structure and to form a channel layer thereby;
- growing doped drain structures from n-type doped indium arsenide on respective sidewalls of the channel layer, over a substrate formed from a material selected from the group consisting of a semi-insulating semiconductor material and a dielectric material;
- anisotropically etching an opening in the dummy gate layer, using the spacer structures as a mask, to form dummy gates;
- anisotropically etching an opening in the channel layer using the dummy gates as a mask to expose the substrate and to form two channel structures;
- growing a doped source structure from p-type doped gallium arsenide in the opening of the channel layer on sidewalls of the channel layer exposed by the anisotropic etch, wherein the doped source structure contacts both channel structures, forming two transistor devices that share the doped source structure.
3 more elements
A method of forming a semiconductor device, comprising:
- forming a mask over an intrinsic semiconductor layer, the mask including a dummy gate layer and spacer structures over the dummy gate layer;
- etching the semiconductor layer to remove semiconductor material around the mask and to form a channel layer thereby;
- forming a doped drain structure having a first conductivity type on sidewalls of the channel layer;
- etching an opening in the dummy gate layer, using the spacer structures as a mask, to form dummy gates;
- etching an opening in a middle of the channel layer, using the dummy gates as a mask;
- and
- forming a doped source structure having a second conductivity type in the opening of the channel layer.
4 more elements
Dependencies are inferred from the claim text.