Metal gate for a field effect transistor and method

A metal gate comprising:

• a conformal dielectric layer immediately adjacent to a channel region of a field effect transistor,
• wherein the field effect transistor comprises source/drain regions, the channel region positioned laterally between the source/drain regions, the metal gate adjacent to the channel region, and gate sidewall spacers between the metal gate and the source/drain regions, and
• wherein the conformal dielectric layer is further positioned laterally immediately adjacent to vertical surfaces of the gate sidewall spacers;
• and
• multiple conformal metal layers comprising:
• a first conformal metal layer immediately adjacent to the conformal dielectric layer opposite the channel region and further opposite lower portions of the vertical surfaces of the gate sidewall spacers, wherein a top end of the first conformal metal layer is at a height above a level of a top surface of the channel region;
• and
• additional conformal metal layers above the first conformal metal layer and further positioned laterally immediately adjacent to the conformal dielectric layer opposite upper portions of the vertical surfaces of the gate sidewall spacers, wherein top ends of the additional conformal metal layers are at a height above the height of the top end of the first conformal metal layer, and wherein the multiple conformal metal layers further comprise a second conformal metal layer between the first conformal metal layer and the additional conformal metal layers such that the second conformal metal layer is positioned laterally immediately adjacent to the conformal dielectric layer opposite middle portions of the vertical surfaces of the gate sidewall spacers and further such that a height of a top end of the second conformal metal layer is between the height of the top end of the first conformal metal layer and the height of the top ends of the additional conformal metal layers.

A metal gate comprising:

• a conformal dielectric layer immediately adjacent to a channel region of a field effect transistor,
• wherein the field effect transistor comprises source/drain regions, the channel region positioned laterally between the source/drain regions, the metal gate adjacent to the channel region, and gate sidewall spacers between the metal gate and the source/drain regions, and
• wherein the conformal dielectric layer is further positioned laterally immediately adjacent to vertical surfaces of the gate sidewall spacers;
• and
• multiple conformal metal layers comprising:
• a first conformal metal layer immediately adjacent to the conformal dielectric layer opposite the channel region and further opposite lower portions of the vertical surfaces of the gate sidewall spacers, wherein a top end of the first conformal metal layer is at a height above a level of a top surface of the channel region and further below a level of a top end of the conformal dielectric layer;
• and
• additional conformal metal layers above the first conformal metal layer, wherein one of the additional conformal metal layers extends over and is immediately adjacent to the top end of the first conformal metal layer and is further positioned laterally immediately adjacent to the conformal dielectric layer opposite upper portions of the vertical surfaces of the gate sidewall spacers, and wherein top ends of the additional conformal metal layers are approximately level with the top end of the first conformal metal layer.