iFinFET
AssigneeInternational Business Machines Corporation
InventorsJuntao Li, Kangguo Cheng, Chen Zhang, Xin Miao
Life of this patent
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Abstract
A technique relates to a semiconductor device. A stack includes two or more nanowires separated by a high-k dielectric material, the high-k dielectric material being formed on at least a center portion of the two or more nanowires in the stack. A separation space between the two or more nanowires is less than two times a thickness of the high-k dielectric material formed on a side wall of the two or more nanowires. A source or a drain formed on sides of the stack.
Claims12
A method of fabricating a semiconductor device, the method comprising:
- forming a stack comprising two or more nanowires extending in a longitudinal direction, inner spacers separating the two or more nanowires and being formed underneath a bottom most nanowire of the two or more nanowires;
- forming a source or a drain on longitudinal end surfaces of the two or more nanowires, a top surface of an upper most nanowire of the two or more nanowires being free of the source or the drain, the source or the drain being in contact with bottom most inner spacers of the inner spacers and extending below the bottom most inner spacers;
- and
- forming a high-k dielectric material on at least a center portion of the two or more nanowires in the stack, the high-k dielectric material being formed between the inner spacers, wherein a separation space between the two or more nanowires is less than two times a thickness of the high-k dielectric material formed on a side wall of the two or more nanowires.
A method of fabricating a semiconductor device, the method comprising:
- forming a stack comprising alternating layers of nanowire layers and sacrificial layers extending in a longitudinal direction on a substrate;
- forming a dummy gate on the stack;
- forming a cap layer on top of the dummy gate;
- recessing part of the nanowire layers and the sacrificial layers in the stack;
- laterally etching the sacrificial layers to remove parts of the sacrificial layers such that spaces remain in the stack at areas in which the parts of the sacrificial layers have been removed;
- forming an inner spacer material on side portions of the sacrificial layers in the spaces left in the stack;
- forming a source or a drain on longitudinal end surfaces of the nanowire layers, a top surface of an upper most nanowire of the two or more nanowires being free of the source or the drain, the source or the drain being in contact with bottom most inner spacers of the inner spacer material and extending below the bottom most inner spacers;
- removing the dummy gate and the cap layer;
- removing the sacrificial layers to form gaps at locations in which the sacrificial layers are removed, such that the nanowire layers are suspended in air over the gaps;
- and
- depositing a high-k dielectric material at least in the gaps, wherein a thickness of each of the sacrificial layers is less than two times a thickness of the high-k dielectric material formed on side walls of the nanowire layers, wherein the inner spacer material is formed underneath a bottom most nanowire layer of the nanowire layers, the high-k dielectric material being formed between the inner spacer material.
Dependencies are inferred from the claim text.