Three-dimensional and planar memory device co-integration
AssigneeInternational Business Machines Corporation
InventorsTakashi Ando, Michael Rizzolo, Chih-Chao Yang, Lawrence A. Clevenger
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Abstract
A method for fabricating a semiconductor device including three-dimensional and planar memory device co-integration includes forming trenches within a horizontal electrode stack to expose portions of a conductive layer, forming vertical electrodes including conductive material within the trenches, forming a planar memory device stack across the device, and patterning the planar memory device stack to form a planar memory device.
Claims19
A method for fabricating a semiconductor device including three-dimensional and planar memory device co-integration, comprising:
- forming trenches within a horizontal electrode stack to expose portions of a conductive layer;
- forming a vertical memory device stack, including forming a dielectric layer on the horizontal electrode stack and the conductive layer, and forming a reactive electrode layer on the dielectric layer;
- forming vertical electrodes including conductive material within the trenches;
- forming a planar memory device stack across the device;
- and
- patterning the planar memory device stack to form a planar memory device.
A semiconductor device including three-dimensional and planar memory device co-integration, comprising:
- a horizontal electrode stack disposed on a conductive layer;
- a vertical memory device including vertical electrodes within the horizontal electrode stack;
- and
- a planar memory device independent from the vertical memory device;
- the vertical memory device and the planar memory device each further including a respective conformal reactive electrode layer disposed on a conformal dielectric layer.
A semiconductor device including three-dimensional and planar memory device co-integration, comprising:
- a horizontal electrode stack disposed on a conductive layer;
- a vertical memory device including vertical electrodes within the horizontal electrode stack;
- and
- a planar memory device disposed on the vertical memory device and connected to the vertical memory device in series;
- the vertical memory device and the planar memory device each further including a respective conformal reactive electrode layer disposed on a conformal dielectric layer.
Dependencies are inferred from the claim text.