Chip package and manufacturing method thereof
AssigneeXintec Inc.
InventorsTsang-Yu Liu, Chia-Ming Cheng
Life of this patent
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Abstract
A manufacturing method of a chip package includes the following steps. A light transmissive substrate is bonded to a first surface of a wafer, such that a dam element between the light transmissive substrate and the wafer covers a conductive pad of the wafer. A second surface of the wafer facing away from the first surface is etched, such that a hollow region and a trench selectively communicated with the hollow region are synchronously formed in the wafer. A first isolation layer on the conductive pad is etched to expose the conductive pad through the hollow region.
Claims17
A chip package, comprising:
- a light transmissive substrate;
- a chip having a conductive pad, a hollow region, a trench, a first surface, and a second surface that faces away from the first surface, wherein the conductive pad is located on the first surface and exposed through the hollow region, and the hollow region is at one side of the trench and selectively communicated with the trench;
- and
- a dam element between the light transmissive substrate and the first surface of the chip and covering both of the hollow region and the trench, wherein the dam element has a top surface and a bottom surface respectively located on the light transmissive substrate and the first surface of the chip, and the dam element overlaps the entire conductive pad and is in contact with a top surface of the conductive pad, and the dam element is between the top surface of the conductive pad and the light transmissive substrate;
- a redistribution layer on the conductive pad;
- and
- a protection layer located on the redistribution layer and in the hollow region and the trench, wherein the protection layer is in direct contact with an edge of the conductive pad and the dam element.
A manufacturing method of a chip package, comprising:
- (a) bonding a light transmissive substrate to a first surface of a wafer, such that a dam element between the light transmissive substrate and the wafer covers a conductive pad of the wafer, wherein the dam element has a top surface and a bottom surface respectively located on the light transmissive substrate and the first surface of the wafer, and the dam element overlaps the entire conductive pad and is in contact with a top surface of the conductive pad, and the dam element is between the top surface of the conductive pad and the light transmissive substrate,
- (b) etching a second surface of the wafer facing away from the first surface, such that a hollow region and a trench that is selectively communicated with the hollow region are synchronously formed in the wafer, wherein the dam element covers both of the hollow region and the trench,
- (c) etching a first isolation layer on the conductive pad for exposing the conductive pad through the hollow region;
- (d) forming a redistribution layer on the conductive pad;
- and
- (e) forming a protection layer on the redistribution layer and in the hollow region and the trench, wherein the protection layer is in direct contact with an edge of the conductive pad and the dam element.
Dependencies are inferred from the claim text.