Semiconductor apparatus having stacked gates and method of manufacture thereof

A semiconductor apparatus comprising:

• a first field-effect transistor (FET) formed on a substrate and comprising a first gate and a first channel;
• a second FET stacked on the first FET along a direction substantially perpendicular to the substrate and comprising a second gate and a second channel, the first channel and the second channel being separated and conductively isolated by a dielectric layer, and the first gate and the second gate being separated and conductively isolated by the dielectric layer;
• a first routing track and a second routing track electrically isolated from the first routing track, each of the first and second routing tracks being provided on a routing plane stacked on the second FET along the direction;
• a first conductive trace configured to conductively couple the first gate of the first FET to the first routing track, the first conductive trace bypassing the second gate and the second FET;
• and
• a second conductive trace configured to conductively couple the second gate of the second FET to the second routing track.