Semiconductor package and method of forming the same

A semiconductor package, comprising:

• a first die, having a first conductive pillar;
• a second die, having a second conductive pillar, a protection layer laterally surrounding the second conductive pillar and a complex compound sheath between the second conductive pillar and the protection layer;
• a molding compound, laterally surrounding and wrapping around the first die and the second die;
• and
• a redistribution structure, disposed on the first die, the second die and the molding compound, wherein the redistribution structure has a first polymer dielectric layer farther away from the first and second dies and a second polymer dielectric layer closer to the first and second dies, the first and second polymer dielectric layers are made of different materials, and
• wherein the redistribution structure has a first via portion embedded in the first polymer dielectric layer and a second via portion embedded in the second polymer dielectric layer, and a ratio of a top width of the first via portion to a bottom width of the first via portion is larger than a ratio of a top width of the second via portion to a bottom width of the second via portion.

A method of forming a semiconductor package, comprising:

• providing a first die having a first conductive pillar disposed thereon;
• providing a second die having a second conductive pillar disposed thereon and forming a protection layer laterally surrounding the second conductive pillar;
• forming a first complex compound layer covering a top surface and a sidewall of the first conductive pillar;
• forming a molding compound encapsulating and wrapping around the first die and the second die such that the molding compound is in contact with the first complex compound layer;
• and
• planarizing the molding compound to expose the first conductive pillar and the second conductive pillar, so that the first complex compound layer is partially removed to form a first complex compound sheath surrounding and covering the sidewall of the first conductive pillar;
• forming a layer of a first polymer material over the first die, the second die and the planarized molding compound and patterning the layer of the first polymer material by performing a first exposure process to form a first polymer dielectric layer having a first via opening;
• forming a first redistribution layer on the first polymer dielectric layer and in the first via opening;
• forming a layer of a second polymer material different from the first polymer material over the first polymer dielectric layer and the first redistribution layer and patterning the layer of the second polymer material by performing a second exposure process different from the first exposure process to form a second polymer dielectric layer having a second via opening, wherein a ratio of a top width of the second via opening to a bottom width of the second via opening is larger than a ratio of a top width of the first via opening to a bottom width of the first via opening;
• and
• forming a second redistribution layer on the second polymer dielectric layer and in the second via opening.