Fan-out semiconductor package

A fan-out semiconductor package comprising:

• a first connection member having a through-hole;
• a first semiconductor chip disposed in the through-hole and including an active surface having connection pads disposed thereon and an inactive surface opposing the active surface;
• a second connection member disposed on the active surface of the first semiconductor chip and including a redistribution layer electrically connected to the first semiconductor chip;
• and
• an encapsulant filling spaces between wall surfaces of the through-hole and side surfaces of the first semiconductor chip and having a cavity disposed above the inactive surface of the first semiconductor chip,
• wherein the cavity is a recess in the encapsulant defined by an inner lower surface of the encapsulant disposed between an uppermost surface of the encapsulant and a lowermost surface of the encapsulant, and an inner side surface of the encapsulant connecting the uppermost surface of the encapsulant and the inner lower surface of the encapsulant,
• the uppermost surface of the encapsulant is substantially coplanar with an upper surface of the first connection member,
• the lowermost surface of the encapsulant is at a lower level than a lower surface of the first connection member.