Single-fin CMOS transistors with embedded and cladded source/drain structures
AssigneeInternational Business Machines Corporation
InventorsXin Miao, Choonghyun Lee, Shogo Mochizuki, Hemanth Jagannathan
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Abstract
Semiconductor devices and methods of forming the same include forming a dummy gate over a fin, which has a lower semiconductor layer, an insulating intermediate layer, and an upper semiconductor layer, to establish a channel region and source/drain regions. Source/drain extensions are grown on the lower semiconductor layer. Source/drain extensions are grown on the upper semiconductor layer. The dummy gate is replaced with a gate stack.
Claims17
A method of forming a semiconductor device, comprising:
- forming a dummy gate over a fin that comprises a lower semiconductor layer, an insulating intermediate layer, and an upper semiconductor layer to establish a channel region and source/drain regions;
- growing source/drain extensions on the lower semiconductor layer;
- growing source/drain extensions on the upper semiconductor layer, wherein one of the lower semiconductor layer and the upper semiconductor layer is embedded by the respective source/drain extensions and the other of the lower semiconductor layer and the upper semiconductor layer is cladded by the respective source/drain extensions;
- and
- replacing the dummy gate with a gate stack.
A method of forming a semiconductor device, comprising:
- forming a dummy gate over a fin that comprises a lower semiconductor layer, an insulating intermediate layer, and an upper semiconductor layer to establish a channel region and source/drain regions;
- performing an epitaxial growth process that grows source/drain extensions on the lower semiconductor layer, and also grows material on an underlying semiconductor substrate layer to form an electrical contact;
- growing source/drain extensions on the upper semiconductor layer;
- and
- replacing the dummy gate with a gate stack.
A method of forming a semiconductor device, comprising:
- forming a dummy gate over a fin that comprises a lower semiconductor layeran insulating intermediate layer, and an upper semiconductor layer to establish a channel region and source/drain regions;
- growing source/drain extensions on the lower semiconductor layer;
- etching away the upper semiconductor layer and the intermediate layer in the source/drain regions;
- growing source/drain extensions on the upper semiconductor layer after etching away the upper semiconductor layer and the intermediate layer in the source/drain regions;
- and
- replacing the dummy gate with a gate stack;
- wherein growing the source/drain extensions on the upper semiconductor layer is performed after growing the source/drain extensions on the lower semiconductor layer.
Dependencies are inferred from the claim text.