Sacrificial gate spacer regions for gate contacts formed over the active region of a transistor

A method of forming an integrated circuit (IC) structure, the method comprising:

• forming a first transistor over a substrate, the first transistor comprising a first gate structure positioned over a first channel region, the first transistor further comprising a first gate spacer formed on a sidewall of the first gate structure;
• forming a second transistor over the substrate, the second transistor comprising a second gate structure positioned over a second channel region, the second transistor further comprising a second gate spacer formed on a sidewall of the second gate structure;
• forming a dielectric region over the first transistor, the second transistor, and the substrate;
• replacing a top portion of the first gate spacer with a first sacrificial gate spacer region;
• replacing a top portion of the second gate spacer with a second sacrificial gate spacer region;
• forming a source or drain (S/D) conductive plug trench and a S/D cap trench positioned in the dielectric region and over a S/D region of the first transistor;
• wherein a first sidewall of the S/D conductive plug trench comprises the first gate spacer of the first transistor;
• wherein a second sidewall of the S/D conductive plug trench comprises the second gate spacer of the second transistor;
• wherein a first sidewall of the S/D cap trench comprises the first sacrificial gate spacer region of the first transistor;
• wherein a second sidewall of the S/D cap trench comprises the second sacrificial gate spacer region of the second transistor;
• and
• increasing a volume of the S/D cap trench by removing the first sacrificial gate spacer region.