Airgap isolation for backend embedded memory stack pillar arrays

A method of forming a memory structure, the method comprising:

• forming an encapsulation layer above and in direct contact with a plurality of memory pillars disposed on a substrate;
• forming an oxide layer directly above the encapsulation layer;
• removing portions of the encapsulation layer located above a top surface of each memory pillar in the plurality of memory pillars;
• recessing the oxide layer to expose an uppermost portion of each memory pillar in the plurality of memory pillars;
• depositing a first dielectric layer directly above the oxide layer, and in direct contact with the encapsulation layer and the exposed uppermost portion of each memory pillar in the plurality of memory pillars;
• forming top metal contacts on the exposed uppermost portion of each memory pillar in the plurality of memory pillars;
• depositing a capping layer directly above the first dielectric layer and the top metal contacts;
• forming an opening on opposing sides of the plurality of memory pillars, wherein the opening extends through the capping layer, the first dielectric layer and a top portion of the oxide layer;
• removing the oxide layer from areas of the memory structure located between the memory pillars, above the encapsulation layer and below the first dielectric layer, wherein after removing the oxide layer a gap remains within the areas of the memory structure;
• and
• forming a second dielectric layer above the capping layer, wherein the second dielectric layer pinches off the opening to form airgaps.