Pre-program read to counter wordline failures

A system, comprising:

• one or more controllers comprising:
• means for performing a read operation on a first portion of a flash memory in response to an erase operation on a second portion of the flash memory, wherein the first portion comprises a plurality of logical wordlines corresponding to a plurality of physical wordlines of the second portion;
• means for counting, for each of the plurality of logical wordlines, a number of memory cells exceeding a threshold error voltage;
• means for determining whether each of the plurality of physical wordlines is defective based on the number of memory cells satisfying a threshold error count for the respective one of the plurality of logical wordlines;
• means for receiving a request to perform a write operation into a third portion of the flash memory that includes at least one physical wordline determined to be defective;
• and
• means for performing the write operation, wherein the write operation comprises writing a predetermined data pattern to the at least one physical wordline,
• wherein:
• the first portion includes first memory cells;
• the second portion includes the first memory cells and second memory cells;
• and
• the means for performing the read operation comprises:
• means for performing the read operation on the first memory cells but not on the second memory cells, in response to the erase operation on the first memory cells and the second memory cells.

A non-transitory machine-readable medium including machine-executable instructions thereon that, when executed by a processor, perform a method comprising:

• performing a read operation on a first portion of a flash memory in response to an erase operation on a second portion of the flash memory, wherein the first portion is at least a subset of the second portion;
• counting, for each of a plurality of wordlines, a number of memory cells exceeding a zero voltage;
• determining whether each of the plurality of wordlines is defective based on a count satisfying a threshold error count;
• receiving a request to perform a write operation into a third portion of the flash memory that includes at least one wordline determined to be defective;
• and
• performing the write operation, wherein the write operation comprises writing a predetermined data pattern to the at least one wordline,
• wherein:
• the first portion includes first memory cells;
• the second portion includes the first memory cells and second memory cells;
• and
• the performing the read operation comprises:
• performing the read operation on the first memory cells but not on the second memory cells, in response to the erase operation on the first memory cells and the second memory cells.