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US 10,832,764 B2Granted
Low-power and high-density core-power lowering for memory write assist
AssigneeQUALCOMM Incorporated
InventorsAdithya Bhaskaran, Mukund Narasimhan, Shiba Narayan Mohanty
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Abstract
A memory is provided that includes a current mirror that controls the amount of current conducted by a head-switch transistor for a memory power supply rail during a core-power-lowering write assist period.
Claims11
A memory, comprising:
- a current mirror configured to conduct a reference current to generate a bias voltage;
- a power supply voltage rail for a plurality of bitcells;
- and
- a head-switch transistor coupled between the power supply voltage rail and a power supply voltage node, wherein the current mirror is further configured to drive a gate of the head-switch transistor with the bias voltage during a core-power-lowering write assist period for the plurality of bitcells.
1 more element
Dependencies are inferred from the claim text.