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US 10,832,748 B2Granted
Memory system that supports dual-mode modulation
AssigneeMicron Technology, Inc.
InventorsRobert Nasry Hasbun, Timothy M. Hollis, Jeffrey P. Wright, Dean D. Gans
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Abstract
Methods, systems, and devices that supports dual-mode modulation in the context of memory access are described. A system may include a memory array coupled with a buffer, and a multiplexer may be coupled with the buffer, where the multiplexer may be configured to output a bit pair representative of data stored within the memory array. The multiplexer may also be coupled with a driver, where the driver may be configured to generate a symbol representative of the bit pair that is output by the multiplexer.
Claims14
A method, comprising:
- determining a first signaling mode for an output circuit of a plurality of output circuits coupled with a memory array;
- configuring the output circuit to generate non-binary symbols representative of data stored within the memory array based at least in part on determining the first signaling mode;
- outputting, by the output circuit, the non-binary symbols based at least in part on configuring the output circuit to generate the non-binary symbols;
- detecting a data rate associated with the memory array for a temporal duration:
- determining that the data rate is below a threshold data rate;
- determining a second signaling mode for the output circuit based at least in part on determining that the data rate is below the threshold data rate;
- configuring the output circuit to generate binary symbols representative of data stored within the memory array based at least in part on determining the second signaling mode;
- and
- outputting, by the output circuit, the binary symbols based at least in part on configuring the output circuit to generate the binary symbols.
6 more elements
A system, comprising:
- a memory array coupled with a first buffer and a second buffer;
- a multiplexer coupled with the first buffer and the second buffer, the multiplexer configured to output bits representative of data stored within the memory array, wherein the multiplexer comprises:
- a first multiplexer configured to output a first bit of the bits;
- and
- a second multiplexer configured to output a second bit of the bits;
- and
- a driver coupled with the first multiplexer and the second multiplexer, the driver configured to generate a symbol representative of the first bit and the second bit.
4 more elements
A system, comprising:
- a memory array coupled with a buffer;
- a multiplexer coupled with the buffer, wherein the multiplexer comprises:
- a first multiplexer configured to output first bits representative of data stored within the memory array;
- and
- a second multiplexer configured to output second bits representative of data stored within the memory array;
- a first driver coupled with the buffer, the first driver configured to generate symbols of a first type representative of data stored within the memory array, wherein each symbol of the first type is representative of at least one first bit output by the first multiplexer and at least one second bit output by the second multiplexer;
- and
- a second driver coupled with the buffer, the second driver configured to generate symbols of a second type representative of data stored within the memory array, wherein each symbol of the second type is representative of one bit of the data, the one bit of the data output by the first multiplexer or the second multiplexer.
5 more elements
Dependencies are inferred from the claim text.