Non-volatile in-memory computing device

An in-memory computing device, comprising:

• a memory array including non-volatile memory cells, each said non-volatile memory cell including one resistive element,
• wherein each said non-volatile memory cell is connected to a word line, connecting a row of said non-volatile memory cells, and to a source line and a bit line, said bit line connecting to said resistive element and each said source line and each said bit line connecting a single column of said non-volatile memory cells;
• a multiple row decoder to activate at least two word lines at a same time;
• a bit line sensor, per selected bit line, to sense a parametric voltage change or a parametric current change related to resistances of said one resistive element in each activated cell of said selected bit line and to decode said parametric voltage change or said parametric current change in a qualitative manner as being a value between 1 and 0.