Unified architecture for BVH construction based on hardware pre-sorting and a parallel, reconfigurable clustering array

A method comprising:

• sorting primitives of a graphics image;
• grouping the primitives to form first level nodes of a hierarchical acceleration structure;
• evaluating, based on a cost or distance function, different groupings of the first level nodes for a next level of the hierarchical acceleration structure to determine efficiency values for the different groupings, the cost or distance function comprising a surface area heuristic (SAH) and/or a Euclidean distance function, wherein the SAH function is used to calculate an expected cost of tracing a non-terminating random ray through the graphic image under a particular of grouping of the first level nodes;
• and
• merging a subset of the first level nodes based on the efficiency values of different groupings to form second level nodes of the hierarchical acceleration structure,
• wherein the operations of evaluating and merging of the first level nodes are performed in parallel on a plurality of parallel processing clusters of a parallel reconfigurable clustering array.

A non-transitory machine-readable medium having program code stored thereon which, when executed by a machine, causes the machine to perform the operations of:

• sorting primitives of a graphics image;
• grouping the primitives to form first level nodes of a hierarchical acceleration structure;
• evaluating, based on a cost or distance function, different groupings of the first level nodes for a next level of the hierarchical acceleration structure to determine efficiency values for the different groupings, the cost or distance function comprising a surface area heuristic (SAH) and/or a Euclidean distance function, wherein the SAH function is used to calculate an expected cost of tracing a non-terminating random ray through the graphic image under a particular of grouping of the first level nodes;
• and
• merging a subset of the first level nodes based on the efficiency values of the different groupings to form second level nodes of the hierarchical acceleration structure,
• wherein the operations of evaluating and merging of the first level nodes are performed in parallel on a plurality of parallel processing clusters of a parallel reconfigurable clustering array.