Integrator circuit for use in a sigma-delta modulator

An integrator circuit for use in a sigma-delta modulator, the integrator circuit comprising:

• a first current path having a first signal input terminal configured to apply a first input signal,
• a second current path having a second signal input terminal configured to apply a second input signal,
• a differential operational amplifier with a first input node and a second input node,
• a switching network comprising:
• a first set of controllable switches configured to selectively connect one of the first or the second input terminal to one of the first or the second input node of the differential operational amplifier, and
• a second set of controllable switches configured to couple the first and the second current path to a reference potential,
• a switching controller configured to control one of a conductive switching state or a non-conductive switching state of the first and the second sets of the controllable switches by generating switching signals during a first operational phase and a subsequent second operational phase of the integrator circuit,
• wherein the first input node of the differential operational amplifier is connected to the first current path and the second input node of the differential operational amplifier is connected to the second current path,
• wherein the first set of controllable switches comprises:
• a first controllable switch arranged between the second input node of the differential operational amplifier and the first current path, and
• a second controllable switch arranged between the first input node of the differential operational amplifier and the second current path,
• wherein the second set of controllable switches comprises:
• a third controllable switch arranged between a reference potential and the first current path, and
• a fourth controllable switch arranged between the reference potential and the second current path,
• wherein the switching controller is configured to generate a first switching signal, a delayed first switching signal, a second switching signal, and a delayed second switching signal for controlling the first set of controllable switches, wherein the delayed first switching signal is delayed in relation to the first switching signal, wherein the delayed second switching signal is delayed in relation to the second switching signal, and
• wherein the switching controller is configured to generate a third switching signal for controlling the second set of controllable switches independently from the generation of the first and the second switching signals and the first and the second delayed switching signals.