Image processing device and method for operating image processing device
AssigneeSamsung Electronics Co., Ltd.
InventorsSung Ho Jun, Kil Whan Lee
Life of this patent
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Abstract
An image processing device includes a multimedia intellectual property (IP) block which processes image data including a first component and a second component; a memory; and a frame buffer compressor (FBC) which compresses the image data to generate compressed data and stores the compressed data in the memory. The frame buffer compressor includes a logic circuit which controls a compression sequence of the first component and the second component of the image data.
Claims19
An image processing device comprising:
- a multimedia intellectual property (IP) block configured to process image data including a first component comprising a luma component and a second component comprising a chroma component;
- a memory;
- and
- a frame buffer compressor (FBC) configured to compress the image data to generate compressed data and store the compressed data in the memory,
- wherein the frame buffer compressor includes a logic circuit configured to control a compression sequence of the first component and the second component of the image data,
- wherein the logic circuit calculates a chroma component target bit from the chroma component and a target compression ratio of the image data, calculates a first luma component target bit from the luma component and the target compression ratio, assigns at least one bit of the chroma component target bit to the first luma component target bit to generate a second luma component target bit, compresses the chroma component according to the remaining bits of the chroma component target bit and compresses the luma component according to the second luma component target bit.
An image processing device comprising:
- a multimedia intellectual property (IP) block configured to process image data conforming to a YUV format including a chroma component and a luma component, the chroma component including Cb and Cr components, the luma component including a Y component;
- a memory;
- and
- a frame buffer compressor (FBC) configured to compress the image data to generate compressed data and store the compressed data in the memory,
- wherein the frame buffer compressor includes a logic circuit configured to control a compression sequence such that a first compression operation having a first compression ratio applied to the chroma component is executed prior to a second compression operation having a second compression ratio applied to the luma component,
- wherein the second compression ratio is decreased prior to executing the second compression operation when a result of the first compression operation exceeds the first compression ratio.
A method for operating an image processing device, the method comprising:
- calculating a total target bit based on a target compression ratio of image data conforming to a YUV format;
- calculating a chroma component target bit for compressing a chroma component including Cb and Cr components of the YUV format;
- assigning the chroma component target bit to compress the chroma component;
- calculating the luma component target bit of the luma component including a Y component of the YUV format, using the chroma component used bit of the compressed data for the chroma component;
- assigning the luma component target bit to compress the luma component;
- and
- adding a dummy bit after the compressed data of the luma component, when the sum of the luma component used bit of the compressed data of the luma component and the chroma component used bit is less than the total target bit.
Dependencies are inferred from the claim text.