Circuits for modulated-mixer-clock multi-branch receivers

A circuit for a modulated-mixer-clock multi-branch receiver, comprising:

• a plurality of low-noise transconductance amplifier (LNTA) branches, each comprising:
• a cascode common-source LNTA,
• a plurality of passive mixers, and
• a plurality of baseband two-stage Miller compensated transimpedance amplifiers (TIAs),
• wherein an input to the cascode common-source LNTA is provided by a radio frequency (RF) signal source, an input to each of the plurality of passive mixers is provided by an output of the cascode common-source LNTA, and an input to each of the plurality of baseband two-stage Miller compensated TIAs is provided by an output of a corresponding one of the plurality of passive mixers;
• a plurality of mixer-first branches, each comprising:
• a plurality of RF switches,
• a plurality of baseband folded-cascode TIAs, and
• a plurality of Cherry-Hooper amplifiers,
• wherein an input to the plurality of RF switches is provided by the RF signal source, an input to each of the plurality of baseband folded-cascode TIAs is provided by an output of at least one of the plurality of RF switches, and an input to each of the plurality of Cherry-Hooper amplifiers is provided by an output of a corresponding one of the plurality of baseband folded-cascode TIAs;
• a first plurality of clock modulators that provide first non-overlapping modulated clocks that are provided to an input of the plurality of passive mixers;
• and
• a second plurality of clock modulators that provide a plurality of tri-level modulated mixer clocks that control the switching of the plurality of RF switches.