High-voltage output amplifier

A high-voltage output amplifier comprising an input stage circuit having a low-voltage amplifier, output stage circuits having high-voltage amplifiers, and photo couplers intervening between the input stage circuit and the output stage circuits, wherein an input signal is amplified by the low-voltage amplifier, the amplified signal is introduced into the high-voltage amplifiers through the photo couplers and is amplified, and the signal thus amplified is outputted from an output terminal of the high-voltage output amplifier, wherein

• the output stage circuits include a positive-side output stage circuit and a negative-side output stage circuit, and the photo couplers include a positive-side photo coupler and a negative-side photo coupler, wherein
• the high-voltage amplifier of each output stage circuit comprises Nch MOS FETs of N stages, and the source of the Nch MOS FET in one stage and the drain of the Nch MOS FET in the next stage are connected to each other in such a manner that the source of the Nch MOS FET in the first stage and the drain of the Nch MOS FET in the second stage are connected to each other, and
• the source of the Nch MOS FET of the N-th stage of the high-voltage amplifier in the positive-side output stage circuit is connected to the drain of the Nch MOS FET of the first stage of the high-voltage amplifier in the negative-side output stage circuit through a resistor, wherein
• a voltage of a predetermined positive high voltage value from a high-voltage positive power source is introduced into the drain of the Nch MOS FET of the first stage of the high-voltage amplifier in the positive-side output stage circuit while a gate voltage of a predetermined positive voltage value is applied to the gate of the Nch MOS FETs in the respective stages, wherein
• a voltage of a predetermined negative high voltage value from a high-voltage negative power source is introduced into the source of the Nch MOS FET of the N-th stage of the high-voltage amplifier in the negative-side output stage circuit while a gate voltage of a predetermined negative voltage value is applied to the gate of the Nch MOS FETs in the respective stages, and wherein
• the current control at the source of the Nch MOS FET of the N-th stage in the positive output stage circuit is conducted by the positive-side photo coupler and the current control at the source of the Nch MOS FET of the N-th stage in the negative output stage circuit is conducted by the negative-side photo coupler.