Surface-tunneling micro electron source and array and realization method thereof
AssigneePeking University
InventorsXianlong Wei, Gongtao Wu
Life of this patent
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Abstract
A tunneling electro source, an array thereof and methods for making the same are provided. The tunneling electron source is a surface tunneling micro electron source having a planar multi-region structure. The tunneling electron source includes an insulating substrate, and two conductive regions and one insulating region arranged on a surface of the insulating substrate. The insulating region is arranged between the two conductive regions and abuts on the two conductive regions. Minimum spacing between the two conductive regions, which equals to a minimum width of the insulating region, is less than 100 nm.
Claims18
A tunneling electron source, wherein the tunneling electron source is a surface tunneling micro electron source having a planar multi-region structure, the tunneling electron source comprising:
- an insulating substrate,
- a pair of electrodes for driving electron emission, and
- two conductive regions and one insulating region arranged on a surface or in a surface layer of the insulating substrate, wherein
- the two conductive regions are arranged between the pair of electrodes, and are electrically connected to the pair of electrodes;
- the insulating region is arranged between the two conductive regions and abuts on the two conductive regions, and
- minimum spacing between the two conductive regions, which equals to a minimum width of the insulating region, is less than 100 nm.
A tunneling electron source, wherein the tunneling electron source is a surface tunneling micro electron source having a planar multi-region structure, the tunneling electron source comprising:
- an insulating substrate, and
- two conductive regions and one insulating region arranged on a surface or in a surface layer of the insulating substrate, wherein
- the two conductive regions and the one insulating region are made from a resistive-switching material;
- the insulating region is arranged between the two conductive regions and abuts on the two conductive regions, and
- minimum spacing between the two conductive regions, which equals to a minimum width of the insulating region, is less than 100 nm.
Dependencies are inferred from the claim text.