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US 10,790,838 B1Granted
Method and apparatus to perform dynamic frequency scaling while a phase-locked loop operates in a closed loop
AssigneeIntel Corporation
InventorsPraveen Mosalikanti, Vaughn J. Grossnickle, Syed Feruz Syed Farooq, Mark Neidengard, Nasser A. Kurd
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Abstract
Dynamic voltage frequency scaling to transition to a target clock frequency and associated target voltage is provided. Dynamic voltage frequency scaling to a different clock frequency is performed by gradually changing the clock frequency using discrete variable-size steps, while dynamically switching to faster or slower reference clock frequencies as appropriate to harmonize the frequency trajectory with system requirements.
Claims20
An apparatus comprising:
- a phase-locked loop to generate an output clock having a frequency dependent on a reference clock and a feedback clock;
- and
- frequency crawl circuitry communicatively coupled to the phase-locked loop, to dynamically select the reference clock and the feedback clock to adjust the frequency in discrete variable-size frequency steps until the frequency is at a target frequency, a size of a frequency step is a smallest frequency step or a multiple of the smallest frequency step, the phase-locked loop operates in closed loop while the frequency is adjusted.
A method comprising:
- generating, by a phase-locked loop, an output clock having a frequency dependent on a reference clock and a feedback clock;
- and
- dynamically selecting the reference clock and the feedback clock to adjust the frequency in discrete variable-size frequency steps until the frequency is at a target frequency, a size of a frequency step is a smallest frequency step or a multiple of the smallest frequency step, the phase-locked loop operates in closed loop while the frequency is adjusted.
A system comprising:
- a processor, the processor comprising:
- a phase-locked loop to generate an output clock having a frequency dependent on a reference clock and a feedback clock;
- and
- frequency crawl circuitry communicatively coupled to the phase-locked loop, to dynamically select the reference clock and the feedback clock to adjust the frequency in discrete variable-size frequency steps until the frequency is at a target frequency, a size of a frequency step is a smallest frequency step or a multiple of the smallest frequency step, the phase-locked loop operates in closed loop while the frequency is adjusted;
- and
- a display communicatively coupled to the processor.
3 more elements
Dependencies are inferred from the claim text.