Testing solid state devices before completing manufacture
AssigneeTexas Instruments Incorporated
InventorsCody Michael Berger, Ramana Tadepalli
Life of this patent
Estimating the term…
Abstract
In some examples, a method for manufacturing a solid state device comprises forming a first layer of the solid state device; forming a conductive layer of the solid state device above the first layer, the conductive layer having an access pad formed on an end of the conductive layer; applying a voltage to the conductive layer using the access pad, the voltage forming an electric field in an area of the first layer beneath the conductive layer; and completing manufacture of the solid state device after applying the voltage.
Claims19
A method comprising:
- forming a dielectric layer of a solid state device that is partially-manufactured;
- forming a conductive layer of the solid state device in contact with the dielectric layer, the dielectric layer beneath the conductive layer being free of conductive material, the conductive layer having an access pad formed on an end of the conductive layer;
- applying a voltage to the conductive layer using the access pad, the voltage forms an electric field in an area of the dielectric layer beneath the conductive layer;
- and
- completing manufacture of the solid state device after applying the voltage.
A method, comprising:
- providing a dielectric layer of a partially-manufactured device, the dielectric layer having a target portion to be stress tested, the target portion being free of conductive material;
- forming a conductive layer, the conductive layer patterned to include a conductive segment above the target portion of the dielectric layer and a discontinuous segment above another portion of the dielectric layer;
- placing a probe in contact with the conductive layer;
- using the probe to apply a voltage in the conductive layer to form an electric field in the target portion of the dielectric layer;
- and
- after applying the voltage, forming a third layer above the conductive layer.
A method for manufacturing a solid state device, comprising:
- providing a dielectric layer, the dielectric layer having a target portion to be stress tested, the target portion being free of conductive material;
- forming a conductive layer, the conductive layer patterned to include a conductive segment above the target portion of the dielectric layer and a discontinuous segment above another portion of the dielectric layer;
- placing a probe in contact with the conductive layer;
- using the probe to apply a voltage in the conductive layer to form an electric field in the target portion of the dielectric layer;
- and
- after applying the voltage, forming a third layer above the conductive layer;
- wherein forming the conductive layer comprises forming an access pad on an end of the conductive segment;
- wherein placing the probe in contact with the conductive layer comprises placing the probe in contact with the access pad;
- further comprising etching away the access pad.
A method for manufacturing a solid state device, comprising:
- providing a dielectric layer, the dielectric layer having a target portion to be stress tested, the target portion being free of conductive material;
- forming a conductive layer, the conductive layer patterned to include a conductive segment above the target portion of the dielectric layer and a discontinuous segment above another portion of the dielectric layer;
- placing a probe in contact with the conductive layer;
- using the probe to apply a voltage in the conductive layer to form an electric field in the target portion of the dielectric layer;
- and
- after applying the voltage, forming a third layer above the conductive layer;
- wherein placing the probe in contact with the conductive layer comprises placing the probe in contact with an inactive area of the conductive layer.
A method of stress testing a partially-manufactured solid state device, comprising:
- obtaining the partially-manufactured solid state device having a dielectric layer and a metal layer formed in contact with the dielectric layer, the dielectric layer beneath the metal layer being free of conductive material;
- and
- applying a voltage to the metal layer of the partially-manufactured solid state device, wherein the voltage forms an electric field in the dielectric layer.
Dependencies are inferred from the claim text.