US 10,778,245 B1 · Bit string conversion

Abstract

Systems, apparatuses, and methods related to bit string conversion are described. Circuitry can perform operations on bit strings, such as universal number and/or posit bit strings, to alter a level of precision (e.g., a dynamic range, resolution, etc.) of the bit strings. For instance, bit string conversion can include receiving, by a memory resource coupled to logic circuitry, a first bit string having a first bit string length. The first quantity of bits can comprise a first bit sub-set, a second bit sub-set, a third bit sub-set, and a fourth bit sub-set. The logic circuitry monitor numerical values corresponding to at least one bit sub-set of the bit string to determine a dynamic range corresponding to the data and/or precision corresponding to the data and generate a second bit string having a second bit string length based, at least in part, on the determined dynamic range of the data, the precision of the data.

Claims20

Dependent claims

A method, comprising:

receiving, by a memory resource coupled to logic circuitry, data comprising a first bit string having a first bit string length, wherein the first quantity of bits comprises a first bit sub-set, a second bit sub-set, a third bit sub-set, and a fourth bit sub-set;
monitoring, by the logic circuitry, numerical values corresponding to at least one bit sub-set of the bit string to determine a dynamic range corresponding to the data, a precision corresponding to the data, or both;
and
altering, by increasing or decreasing a quantity of bits of the first bit string, a numerical value corresponding to at least one bit sub-set of the first bit string, or both, to generate a second bit string having a second bit string length based, at least in part, on the determined dynamic range of the data, the precision of the data, or both.

1 more element

An apparatus, comprising:

a memory resource configured to receive data comprising a bit string having a first quantity of bits that correspond to a first bit string length;
and
logic circuitry coupled to the memory resource, wherein the logic circuitry is configured to:
monitor numerical values corresponding to at least one bit sub-set of the bit string to determine a dynamic range corresponding to the data, a precision corresponding to the data, or both;
and
alter the first quantity of bits to a second quantity of bits that correspond to a second bit string length based, at least in part, on the determined dynamic range of the data, the precision of the data, or both;
and
registers coupled to the logic circuitry, wherein the registers are configured to:
store class interval information corresponding to respective bit sub-sets of the first bit string, the class interval information including the numerical values associated with a quantity of bits corresponding to the respective bit sub-sets of the first bit string;
and
provide access, responsive to instructions generated by the logic circuitry, to the to the class interval information to determine the dynamic range corresponding to the data, the precision of the data, or both.

8 more elements

A system, comprising:

a host;
control circuitry comprising logic circuitry and a memory resource coupled to the host, wherein the control circuitry is configured to:
cause data comprising a first bit string having a first quantity of bits that correspond to a first bit string length to be stored in the memory resource;
monitor numerical values corresponding to at least one bit sub-set of the first bit string to determine a dynamic range corresponding to the data, a precision of the data, or both;
receive a command from the host signaling a request for the data for use by a host application;
alter a quantity of bits associated with the first bit string based on the dynamic range of the data, the precision of the data, a scope of the host application, or combinations thereof to produce a second bit string having a second quantity of bits that correspond to a second bit string length;
and
cause the second bit string to be transferred to the host to fulfill the host command.

5 more elements

Dependencies are inferred from the claim text.

Bit string conversion

Life of this patent

Bit string conversion

Life of this patent

Abstract

Claims20