High-frequency integrated circuit
AssigneesKabushiki Kaisha Toshiba, Toshiba Electronics Devices & Storage Corporation
InventorsShinji Ohno, Toshifumi Ishimori, Mitsuru Sugawara
Life of this patent
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Abstract
According to one embodiment, a first switch controls conduction between first and second nodes according to a potential on a first control node. A second switch controls conduction between the first control node and a first potential node according to a potential on a second control node. A first circuit includes first and second output nodes respectively coupled to the first and second control nodes, and outputs at the second output node a potential that brings the second switch out of conduction while outputting a first potential at the first output node. The first circuit has a high impedance at the first output node while outputting at the second output node a potential that brings the second switch into conduction.
Claims15
A high-frequency integrated circuit comprising:
- a first switch circuit which controls conduction between a first node and a second node according to a potential applied to a first control node;
- a second switch circuit which controls conduction between the first control node and a first potential node according to a potential applied to a second control node;
- and
- a first circuit including a first output node coupled to the first control node and a second output node coupled to the second control node, the first circuit outputting, at the second output node, a first potential that brings the second switch circuit out of conduction during a period of outputting a second potential at the first output node, the first circuit having a first impedance at the first output node during the period of outputting the second potential at the first output node, the first circuit having a second impedance at the first output node during a period of outputting, at the second output node, a third potential that brings the second switch circuit into conduction, the second impedance being higher than the first impedance, wherein
- the first circuit comprises
- a first potential circuit which outputs the second potential at a third node;
- a third switch circuit between the third node and the first output node, the third switch circuit being brought into conduction exclusively with the second switch circuit;
- and
- a second circuit including the second output node.
A high-frequency integrated circuit comprising:
- a first switch circuit which controls conduction between a first node and a second node according to a potential applied to a first control node;
- a second switch circuit which controls conduction between the first control node and a first potential node according to a potential applied to a second control node;
- and
- a first circuit including a first output node, a second output node, a third node, a third switch circuit, and a first potential circuit, wherein
- the first potential circuit outputs a first potential at the third node,
- the first output node is coupled to the first control node,
- the second output node is coupled to the second control node, and
- the third switch circuit is provided between the third node and the first output node, is configured to vary an impedance between the third node and the first output node, and is brought into conduction exclusively with the second switch circuit.
A high-frequency integrated circuit comprising:
- a first switch circuit which controls conduction between a first node and a second node according to a potential applied to a first control node;
- a second switch circuit which controls conduction between the first control node and a first potential node according to a potential applied to a second control node;
- and
- a first circuit including a first output node, a second output node, a third node, and a variable impedance circuit, wherein
- the first output node is coupled to the first control node,
- the second output node is coupled to the second control node,
- the variable impedance circuit is provided between the third node and the first output node, and is configured to vary an impedance between the third node and the first output node, and
- the impedance between the third node and the first output node becomes low exclusively with an impedance of the second switch circuit.
Dependencies are inferred from the claim text.