Microprocessor with booth multiplication

A microprocessor, comprising:

• a first storage area and a second storage area;
• a datapath, for execution of a microinstruction,
• wherein:
• a first field of the microinstruction is designed to instruct the datapath to get multiplicand number supply data from the first storage area;
• a second field of the microinstruction is designed to instruct the datapath to get multiplier number supply data from the second storage area;
• a third field of the microinstruction is designed to instruct a word length according to which the datapath operates;
• the datapath gets multi-bit acquisitions for Booth multiplication from the multiplier number supply data;
• the datapath divides the multiplicand number supply data into multiplicand numbers according to the word length, and performs Booth multiplication on the multiplicand numbers based on the multi-bit acquisitions to get partial products;
• and
• according to the word length, the datapath selects some of the partial products to be shifted and added for generation of a plurality of products.