# US 10,772,219 B2 · Copper foil with carrier, copper foil with resin and method for manufacturing printed wiring board

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- Number: US 10,772,219 B2
- Document ID: US10772219B2
- Status: Granted
- Kind: B2
- Application number: 16/065,519
- Filed: 2016-12-01
- Published: 2018-12-27
- Granted: 2020-09-08
- Earliest claimed: 2015-12-25
- Assignees: Mitsui Mining & Smelting Co., Ltd.
- Applicants: Mitsui Mining & Smelting Co., Ltd.
- Inventors: Yoshinori Matsuura
- Web page: https://patentgrep.com/patent/US10772219B2

## CPC

- H05K 3/4682: {Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil}
- B32B 9/00: Layered products comprising a {layer of a} particular substance not covered by groups B32B11/00 - B32B29/00
- B32B 15/08: of synthetic resin
- C23C 14/0605: {Carbon}
- C23C 14/20: on organic substrates
- C23C 14/205: {by cathodic sputtering}
- C23C 14/35: by application of a magnetic field, e.g. magnetron sputtering {(C23C14/3457 takes precedence)}
- C23C 18/1653: {Two or more layers with at least one layer obtained by electroless plating and one layer obtained by electroplating}
- C23C 18/1882: {Use of organic or inorganic compounds other than metals, e.g. activation, sensitisation with polymers}
- C25D 5/022: {using masking means}
- H05K 1/0296: {Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295 (H05K1/11 takes precedence; lay-out adapted to mounted component configuration H05K1/18)}
- H05K 3/0032: {of organic insulating material}
- H05K 3/06: the conductive material being removed chemically or electrolytically, e.g. by photo-etch process {(semi-additive methods H05K3/108)}
- H05K 3/4652: {Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern (H05K3/4647 takes precedence)}
- C23C 18/38: Coating with copper
- C25D 1/04: Wires; Strips; Foils
- H05K 3/108: {by semi-additive methods; masks therefor (characterised by metallic etch mask H05K3/062; electroplating methods or apparatus H05K3/241)}
- H05K 2201/0323: Carbon
- H05K 2201/0338: Layered conductor, e.g. layered metal substrate, layered finish layer or layered thin film adhesion layer
- H05K 2201/0355: Metal foils
- H05K 2201/09509: Blind vias, i.e. vias having one side closed
- H05K 2203/0156: Temporary polymeric carrier or foil, e.g. for processing or transferring
- H05K 2203/072: Electroless plating, e.g. finish plating or initial plating
- H05K 2203/107: Using laser light
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- B32B: LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- C23C: COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL (making metal-coated products by extrusion B21C23/22; covering with metal by connecting pre-existing layers to articles, see the relevant places, e.g. B21D39/00, B23K; metallising of glass C03C; metallising mortars, concrete, artificial stone, ceramics or natural stone C04B41/00; enamelling of, or applying a vitreous layer to, metals C23D; treating metal surfaces or coating of metals by electrolysis or electrophoresis C25D; single-crystal film growth C30B; by metallising textiles D06M11/83; decorating textiles by locally metallising D06Q1/04)
- C25D: PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR

## Abstract

There is provided a copper foil with a carrier particularly suitable for a circuit forming process for removing a carrier after laser drilling and desmear treatment, in detail, a copper foil with a carrier having high heat press resistance (heat resistance) of the carrier, laser drilling performance, corrosion resistance of the carrier against the desmear treatment, corrosion resistance of a release layer against the desmear treatment, and carrier release strength. The copper foil with a carrier comprises a carrier comprising at least one resin selected from polyethylene naphthalate (PEN) resins, polyethersulfone (PES) resins, polyimide resins, and polyphenylene sulfide resins; a silicon layer provided on the carrier, the silicon layer mainly containing silicon; a carbon layer provided on the silicon layer, the carbon layer mainly containing carbon; and an extremely thin copper layer provided on the carbon layer.

## Claims

### Claim 1

A copper foil comprising:
a carrier comprising at least one resin selected from polyethylene naphthalate resins, polyethersulfone resins, polyimide resins, and polyphenylene sulfide resins;
a silicon layer provided on the carrier;
a carbon layer provided on the silicon layer; and
a copper layer provided on the carbon layer, the copper layer having an arithmetic average roughness Ra of 1.0 to 50 nm measured according to JIS B 0601-2001.

### Claim 2 (depends on 1)

The copper foil according to claim 1, wherein the silicon layer has a silicon content of 60 atom % or more.

### Claim 3 (depends on 1)

The copper foil according to claim 1, wherein the silicon layer has a thickness of 1 to 50 nm.

### Claim 4 (depends on 1)

The copper foil according to claim 1, wherein the carbon layer has a thickness of 0.1 to 10 nm.

### Claim 5 (depends on 1)

The copper foil according to claim 1, wherein the copper layer has a thickness of 50 to 2500 nm.

### Claim 6 (depends on 1)

A resin-coated copper foil comprising:
the copper foil according to claim 1, and
a resin composition layer provided on the copper layer of the copper foil.

### Claim 7 (depends on 1)

The copper foil according to claim 1, further comprising a silicon-based adhesion layer on the copper layer, the silicon-based adhesion layer including 60 to 98 atom % silicon, 1.0 to 35.0 atom % carbon, and 1.0 to 40.0 atom % oxygen.

### Claim 8

A method for manufacturing a printed circuit board comprising:
laminating a resin layer and the copper foil in sequence on at least one side of a core layer to form a laminate, the copper foil including:
a carrier comprising at least one resin selected from polyethylene naphthalate resins, polyethersulfone resins, polyimide resins, and polyphenylene sulfide resins;
a silicon layer provided on the carrier;
a carbon layer provided on the silicon layer; and
a copper layer provided on the carbon layer, the copper layer having an arithmetic average roughness Ra of 1.0 to 50 nm measured according to JIS B 0601-2001;
forming a via hole by laser drilling of the laminate,
desmear treating the laminate for removing smears from the via hole, and
removing the carrier after the desmear treating.

### Claim 9 (depends on 8)

The method according to claim 8, further comprising performing an electroless copper plating between the desmear treating and the carrier removing or after the carrier removing.

### Claim 10

A method for manufacturing a printed circuit board comprising:
laminating a copper foil on at least one side of a core layer to form a laminate, and a resin composition layer provided on a copper layer of the copper foil, the copper foil including:
a carrier comprising at least one resin selected from polyethylene naphthalate resins, polyethersulfone resins, polyimide resins, and polyphenylene sulfide resins;
a silicon layer provided on the carrier;
a carbon layer provided on the silicon layer; and
the copper layer provided on the carbon layer and having an arithmetic average roughness Ra of 1.0 to 50 nm measured according to JIS B 0601-2001;
forming a via hole by laser drilling of the laminate,
desmear treating the laminate for removing smears from the via hole, and
removing the carrier after the desmear treating.

### Claim 11 (depends on 10)

The method according to claim 10, further comprising performing an electroless copper plating between the desmear treating and the carrier removing or after the carrier removing.