# US 10,771,296 B1 · 2.4GHz ISM band zero-IF transceiver and method thereof > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,771,296 B1 - Document ID: US10771296B1 - Status: Granted - Kind: B1 - Application number: 16/451,125 - Filed: 2019-06-25 - Granted: 2020-09-08 - Earliest claimed: 2019-06-25 - Assignees: Realtek Semiconductor Corp. - Applicants: Realtek Semiconductor Corp. - Inventors: Chia-Liang (Leon) Lin - Web page: https://patentgrep.com/patent/US10771296B1 ## CPC - H03L 7/183: a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number {(H03L7/1806 takes precedence)} - H04L 27/12: Modulator circuits; Transmitter circuits - H03L 7/099: concerning mainly the controlled oscillator of the loop - H04B 1/04: Circuits - H04B 1/0475: {with means for limiting noise, interference or distortion (H04B1/0483 takes precedence)} - H03L: AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES (generation of oscillations H03B) - H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M) - H04B: TRANSMISSION ## Abstract A method uses a controlled oscillator to output an oscillation signal in accordance with a control signal. The method operates by using a first divide-by-1.5 circuit to convert the oscillation signal into a first divided-down signal, using a second divide-by-1.5 circuit to convert the first divided-down signal into a second divided-down signal, using a divide-by-2 circuit to convert the second divided-down signal into a LO (local oscillator) signal, using a modulator to modulate the LO signal into a RF (radio frequency) signal in accordance with a baseband signal, and using a controller to establish the control signal in accordance with a relative timing between a reference signal and the oscillation signal. ## Claims ### Claim 1 A transmitter comprising: a controlled oscillator configured to output an oscillation signal in accordance with a control signal; a first divide-by-1.5 circuit configured to convert the oscillation signal into a first divided-down signal; a second divide-by-1.5 circuit configured to convert the first divided-down signal into a second divided-down signal; a divide-by-2 circuit configured to convert the second divided-down signal into a LO (local oscillator) signal; a modulator configured to modulate the LO signal into a RF (radio frequency) signal in accordance with a baseband signal; and a controller configured to establish the control signal in accordance with a relative timing between a reference signal and the oscillation signal, wherein the controller comprises: a frequency divider configured to convert a feedback signal, which is selected from one of the oscillation signal, the first divided-down signal, and the second divided-down signal, into a third divided-down signal in accordance with a divide-down factor; a phase detector configured to output a phase error signal representing a difference between a timing of the reference signal and a timing of the third divided-down signal; and a loop filter configured to filter the phase error signal into the control signal. ### Claim 2 (depends on 1) The transmitter of claim 1, wherein the phase detector is configured to receive the reference signal and the third divided-down signal. ### Claim 3 (depends on 1) The transmitter of claim 1, wherein the controlled oscillator is a voltage-controlled oscillator and the control signal is an analog voltage. ### Claim 4 (depends on 1) The transmitter of claim 1, wherein the controlled oscillator is a digitally controlled oscillator and the control signal is a digital code. ### Claim 5 (depends on 1) The transmitter of claim 1, wherein the controlled oscillator includes a duty cycle correction circuit. ### Claim 6 (depends on 1) The transmitter of claim 1, wherein the first divide-by-1.5 circuit includes a duty cycle correction circuit. ### Claim 7 (depends on 1) The transmitter of claim 1, wherein the second divide-by-1.5 circuit includes a duty cycle correction circuit. ### Claim 8 (depends on 1) The transmitter of claim 1, wherein the modulator comprises a mixer. ### Claim 9 (depends on 8) The transmitter of claim 8, wherein the baseband signal is a two-dimensional signal comprising an in-phase component and a quadrature component. ### Claim 10 (depends on 9) The transmitter of claim 9, wherein the LO signal is a two-dimensional signal comprising an in-phase component and a quadrature component. ### Claim 11 A method comprising: using a controlled oscillator to output an oscillation signal in accordance with a control signal; using a first divide-by-1.5 circuit to convert the oscillation signal into a first divided-down signal; using a second divide-by-1.5 circuit to convert the first divided-down signal into a second divided-down signal; using a divide-by-2 circuit to convert the second divided-down signal into a LO (local oscillator) signal; using a modulator to modulate the LO signal into a RF (radio frequency) signal in accordance with a baseband signal; and using a controller to establish the control signal in accordance with a relative timing between a reference signal and the oscillation signal, wherein the controller comprises: a frequency divider configured to convert a feedback signal, which is selected from one of the oscillation signal, the first divided-down signal, and the second divided-down signal, into a third divided-down signal in accordance with a divide-down factor; a phase detector configured to output a phase error signal representing a difference between a timing of the reference signal and a timing of the third divided-down signal; and a loop filter configured to filter the phase error signal into the control signal. ### Claim 12 (depends on 11) The method of claim 11, wherein the phase detector is configured to receive the reference signal and the third divided-down signal. ### Claim 13 (depends on 11) The method of claim 11, wherein the controlled oscillator is a voltage-controlled oscillator and the control signal is an analog voltage. ### Claim 14 (depends on 11) The method of claim 11, wherein the controlled oscillator is a digitally controlled oscillator and the control signal is a digital code. ### Claim 15 (depends on 11) The method of claim 11, wherein the controlled oscillator includes a duty cycle correction circuit. ### Claim 16 (depends on 11) The method of claim 11, wherein the first divide-by-1.5 circuit includes a duty cycle correction circuit. ### Claim 17 (depends on 11) The method of claim 11, wherein the second divide-by-1.5 circuit includes a duty cycle correction circuit. ### Claim 18 (depends on 11) The method of claim 11, wherein the modulator comprises a mixer. ### Claim 19 (depends on 18) The method of claim 18, wherein the baseband signal is a two-dimensional signal comprising an in-phase component and a quadrature component. ### Claim 20 (depends on 19) The method of claim 19, wherein the LO signal is a two-dimensional signal comprising an in-phase component and a quadrature component.