# US 10,771,054 B2 · Control circuit for solid state power controller > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,771,054 B2 - Document ID: US10771054B2 - Status: Granted - Kind: B2 - Application number: 15/712,180 - Filed: 2017-09-22 - Published: 2018-03-29 - Granted: 2020-09-08 - Earliest claimed: 2016-09-26 - Assignees: Hs Elektronik Systeme GmbH - Applicants: HS Elektronik Systeme GmbH - Inventors: Markus Greither; David Kucharski - Web page: https://patentgrep.com/patent/US10771054B2 ## CPC - H03K 17/687: the devices being field-effect transistors - G06F 1/24: Resetting means - G06F 1/30: Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations (for resetting only G06F1/24) - H03K 17/24: Storing the actual state when the supply voltage fails - H03K 2217/0081: Power supply means, e.g. to the switch driver - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A control circuit configured to supply a control voltage to a control terminal (G) of a solid state solid state switching device of a solid state power controller. The control circuit comprises: a primary controller operative to supply a primary control voltage to the control terminal (G) of the solid state switching device; and an auxiliary circuit configured to supply an auxiliary control voltage to the control terminal (G) of the solid state switching device in case the primary controller falls into an inoperative condition. ## Claims ### Claim 1 A control circuit configured to supply a control voltage to a control terminal (G) of a solid state switching device of a solid state power controller, the solid state switching device having a first terminal (D), a second terminal (S), and the control terminal (G), the solid state switching device configured to switch between an OFF operation mode in which the second terminal (S) is electrically disconnected from the first terminal, and an ON operation mode in which the second terminal (S) is electrically connected to the first terminal (D), according to the control voltage applied to the control terminal (G); wherein the control circuit comprises: a primary controller operative to supply a primary control voltage to the control terminal (G) of the solid state switching device; and an auxiliary circuit configured to supply an auxiliary control voltage to the control terminal (G) of the solid state switching device in case the primary controller falls into an inoperative condition, wherein the auxiliary circuit comprises a memory unit configured to store information indicative of the primary control voltage applied by the primary controller at the time of falling into the inoperative condition, wherein the memory unit has the configuration of a flip-flop or latch and has a power input connected to a power supply of the primary controller, wherein the control circuit further comprises a charge storing unit configured to temporarily supply the memory unit with electric power when the power supply of the primary controller is cut off, wherein the memory unit is connected in between an output side of the primary controller and an input side of the control terminal (G), and has a data input to which the primary control voltage is supplied, and a data output connected to the control terminal (G) of the solid state switching device, wherein the memory unit has a clock input supplied by a clock signal indicative of control cycles of the primary controller, and the memory unit is configured to store information indicative of the primary control voltage applied by the primary controller in a previous or current control cycle, and wherein the memory unit has a reset input for setting the data output of the memory unit to a default value. ### Claim 2 (depends on 1) The control circuit according to claim 1, wherein the auxiliary control voltage corresponds to the primary control voltage supplied by the primary controller at the time of falling into the inoperative condition. ### Claim 3 (depends on 1) The control circuit according to claim 1, wherein the memory unit is configured to supply the primary control voltage or the auxiliary control voltage at the data output. ### Claim 4 (depends on 1) The control circuit according to claim 1, wherein the memory unit is a one bit memory unit. ### Claim 5 (depends on 4) The control circuit according to claim 4, wherein the memory unit has the configuration of a D-flip-flop. ### Claim 6 (depends on 1) The control circuit according to claim 1, further comprising a status indication circuit configured to provide a signal indicative of the status of the primary controller. ### Claim 7 (depends on 6) The control circuit according to claim 6, wherein the status indication circuit comprises a charge pump circuit supplied by a pulse signal from the primary controller and providing a steady state signal indicative of the status of the primary controller. ### Claim 8 (depends on 7) The control circuit according to claim 7, further comprising a comparator having a first comparator input supplied by the signal indicative of the status of the primary controller; a second comparator input supplied by a signal indicative of the power supply of the primary controller, and a comparator output connected to the reset input of the memory unit. ### Claim 9 (depends on 1) A solid state power controller configured to supply electric power from a power supply to at least one load, the solid-state power controller comprising a control circuit according to claim 1.