# US 10,770,889 B2 · Semiconductor circuit > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,770,889 B2 - Document ID: US10770889B2 - Status: Granted - Kind: B2 - Application number: 15/870,114 - Filed: 2018-01-12 - Published: 2018-07-19 - Granted: 2020-09-08 - Earliest claimed: 2017-01-16 - Assignees: Honda Motor Co., Ltd. - Applicants: Honda Motor Co., Ltd. - Inventors: Shogo Nagayoshi; Shinya Watanabe; Yasuhisa Saito; Hitoshi Saito; Shinyu Hirayama; Hironori Sawamura - Web page: https://patentgrep.com/patent/US10770889B2 ## CPC - H02H 7/1227: {responsive to abnormalities in the output circuit, e.g. short circuit} - H02M 1/08: Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters - H02M 1/088: for the simultaneous control of series or parallel connected semiconductor devices - H02M 1/32: Means for protecting converters other than automatic disconnection - H02M 7/48: using discharge tubes with control electrode or semiconductor devices with control electrode - H03K 17/08148: {in composite switches} - H03K 17/0826: {in bipolar transistor switches} - H03K 17/0828: {in composite switches} - H03K 17/14: Modifications for compensating variations of physical values, e.g. of temperature - H10W 44/501: {Inductive arrangements (H10W44/20 takes precedence)} - H10W 72/00: Interconnections or connectors in packages - H02M 7/493: the static converters being arranged for operation in parallel - H10W 90/00: Package configurations - H02H: EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS (indicating or signalling undesired working conditions G01R, e.g. G01R31/00, G08B; locating faults along lines G01R31/08; emergency protective devices H01H) - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) - H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M) - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract To provide a semiconductor circuit capable of slightly generating inductance in two facing bus bars. Provided with a semiconductor circuit in which a collector-side bus bar 46 and an emitter-side bus bar 41 are arranged in parallel in a state of being isolated from each other and are fitted in a fixed manner to each other, and a inductance generation portion 411 is provided in one or both of the collector-side bus bar 46 and the emitter-side bus bar 41, the inductance generation portion 411 generating a difference in inductance between the collector-side bus bar 46 and the emitter-side bus bar 41. ## Claims ### Claim 1 A semiconductor circuit comprising: a plurality of semiconductor switches arranged in parallel to one another and configuring arms connected between positive and negative poles of a DC power supply; and a drive circuit configured to cause the plurality of semiconductor switches of the arms to switch to an on state or an off state at the same time, wherein, the drive circuit includes means to detect a short circuit of a semiconductor switch and cause the short-circuited semiconductor switch to switch to the off state, an inter-switch current suppression portion is electrically connected to signal lines between the drive circuit, and control signal input terminals and current output terminals of the semiconductor switches, the inter-switch current suppression portion is a semiconductor circuit including oppositely wound coils facing each other, and configuring a semiconductor power conversion device that facilitates the semiconductor switches to switch to the off state with the drive circuit, using the inter-switch current flowing between the current output terminals of the plurality of semiconductor switches, a current lead wire connected from the positive pole to collector terminals of the semiconductor switches is configured from a collector-side bus bar branched in an equal manner from the collector terminals of the adjacent semiconductor switches, a current lead wire connected from emitter-side terminals of the semiconductor switches to the negative pole is configured from an emitter-side bus bar branched in an equal manner to the emitter terminals of the adjacent semiconductor switches, the collector-side bus bar and the emitter-side bus bar are arranged in parallel in a state of being isolated from each other and are fitted in a fixed manner to each other, and an inductance generation portion is provided in one or both of the collector-side bus bar and the emitter-side bus bar, the inductance generation portion generating a difference in inductance between the collector-side bus bar and the emitter-side bus bar. ### Claim 2 (depends on 1) The semiconductor circuit according to claim 1, wherein the inductance generation portion is configured from a groove formed in at least one of the collector-side bus bar and the emitter-side bus bar. ### Claim 3 (depends on 1) The semiconductor circuit according to claim 1, wherein the inductance generation portion is configured from a slit formed in at least one of the collector-side bus bar and the emitter-side bus bar. ### Claim 4 (depends on 1) The semiconductor circuit according to claim 1, wherein the inductance generation portion is configured from a portion which the collector-side bus bar and the emitter-side bus bar are separated by and arranged at a predetermined distance.