# US 10,770,599 B2 · Deep trench MOS barrier junction all around rectifier and MOSFET

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- Number: US 10,770,599 B2
- Document ID: US10770599B2
- Status: Granted
- Kind: B2
- Application number: 15/853,794
- Filed: 2017-12-23
- Published: 2018-05-17
- Granted: 2020-09-08
- Earliest claimed: 2016-09-03
- Assignees: Champion Microelectronic Corp.; Yutechnix, Inc.
- Applicants: Yutechnix, Inc.; Champion Microelectronic Corp.
- Inventors: Haiping Dun; Ho-Yuan Yu; Hung-Chen Lin
- Web page: https://patentgrep.com/patent/US10770599B2

## CPC

- H10D 8/605: {of the trench conductor-insulator-semiconductor barrier type, e.g. trench MOS barrier Schottky rectifiers [TMBS]}
- H10D 8/60: Schottky-barrier diodes
- H10D 30/66: Vertical DMOS [VDMOS] FETs
- H10D 30/665: {having edge termination structures}
- H10D 30/668: {having trench gate electrodes, e.g. UMOS transistors}
- H10D 48/34: Bipolar devices
- H10D 62/126: {Top-view geometrical layouts of the regions or the junctions}
- H10D 62/127: {of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs}
- H10D 64/117: {Recessed field plates, e.g. trench field plates or buried field plates}
- H10D 64/519: {characterised by their top-view geometrical layouts}
- H10D 84/146: {the built-in components being Schottky barrier diodes}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

Apparatus and other embodiments associated with high speed and high breakdown voltage rectifier are disclosed. A Junction All Around structure, where a deep trench structure surrounds and encloses a P-N junction or a MOS structure, is created and applied in various rectifiers. In one embodiment, multiple deep trenches in ring shape enclosed a vertical P-N junction. For each deep trench, a corresponding wider ring-shape P+ region is created on top of a N− epi layer. This enclosed deep trench surrounding a vertical P-N junction and a thinner N− epitaxial layer allow higher reverse bias voltage and low leakage current. In another embodiment, an enclosed deep trench in ring shape surrounds a horizontal P-N junction, which results in a planar N-channel MOS during forward bias. The structure can be extended to multiple deep trenches with associated horizontal P-N junctions. In a further embodiment, an enclosed deep trench in ring shape surrounds a vertical MOS structure plus a shallow trench gate in the center to create yet another device with very high breakdown voltage and very low leakage current. This structure can be extended to multiple deep trenches and shallow trenches as well.

## Claims

### Claim 1

A rectifier device, comprising:
a first n-type semiconductor layer;
a second n-type epitaxial semiconductor layer with lower doping concentration but larger depth than that of the first n-type semiconductor layer, deposed on top of the first n-type semiconductor layer;
a p-type semiconductor layer in continuous ring shape deposed on at least the top surface of the second n-type semiconductor layer;
a metal layer deposed above the p-type semiconductor layer and completely overlapping the p-type semiconductor layer;
at least two deep trenches comprising a first enclosed deep trench and a second enclosed deep trench, wherein
the first enclosed deep trench is etched in ring shape along periphery of the rectifier device and from top of the p-type semiconductor layer down to the bottom of the second n-type semiconductor layer; and
the second enclosed deep trench in ring shape running parallel to the first enclosed deep trench but with smaller radius, is etched from the top of the p-type semiconductor layer down to the bottom of the second n-type semiconductor layer;
wherein both the first and second enclosed deep trenches have an oxide coating on their sidewalls and bottom surfaces, and a polysilicon layer filling their centers and connected to the metal layer for operation to form a MOS-Sidewall-Plate structure; and
wherein all trenches of the rectifier device are enclosed trenches in ring shape with the same MOS-Sidewall-Plate structure, and the ring-shape p-type semiconductor layer completely covers at least the upper inner and outer rim portions of each deep trench of the rectifier device.

### Claim 2 (depends on 1)

The rectifier device of claim 1, wherein the p-type semiconductor layer has a first ring-shape region and a second ring-shape region that cover only part of the second n-type semiconductor layer, and the first ring-shape region of the p-type semiconductor layer runs parallel to and has wider ring width than that of the first enclosed deep trench, and the second ring-shape region of the p-type semiconductor layer runs parallel to and has wider ring width than that of the second enclosed deep trench.

### Claim 3 (depends on 2)

The rectifier device of claim 2, further comprising a third ring-shape region of the p-type semiconductor layer deposed between the first ring-shape region and the second ring-shape region of the p-type semiconductor layer, and a third enclosed deep trench etched from the top of the third ring-shape region of the p-type semiconductor layer down to the bottom of the second n-type semiconductor layer and running parallel to the third ring-shape region of the p-type semiconductor layer.

### Claim 4 (depends on 1)

The rectifier device of claim 1, wherein the first enclosed deep trench is the outermost trench and the second enclosed deep trench is the innermost trench of the rectifier device, and both are etched down to the first n-type semiconductor layer, close to the bottom of the rectifier device.

### Claim 5

A rectifier device, comprising:
a first n-type semiconductor layer;
a second n-type epitaxial semiconductor layer with lower doping concentration but larger depth than that of the first n-type semiconductor layer, deposed on top of the first n-type semiconductor layer;
a p-type semiconductor layer having at least a first p-type continuous ring circle and a second p-type continuous ring circle deposed on at least the top surface of the second n-type semiconductor layer, wherein the first p-type semiconductor ring circle has larger radius than that of the second p-type semiconductor ring circle;
a metal layer deposed above and completely overlap the p-type semiconductor layer;
at least two enclosed deep trenches in ring circle comprising a first deep trench and a second deep trench, wherein
the first deep trench in ring circle runs parallel to and is etched from top of the first p-type semiconductor ring circle down to the bottom of the second n-type semiconductor layer, wherein the first p-type semiconductor ring circle has wider ring width than that of the first deep trench and completely covers the upper rim portion of the first deep trench;
the second deep trench in ring circle runs parallel to and is etched from top of the second p-type semiconductor ring circle down to the bottom of the second n-type semiconductor layer, wherein the second p-type semiconductor ring circle has wider ring width than that of the second deep trench and completely covers the upper rim portion of the second deep trench; and
wherein all trenches of the rectifier device are enclosed trenches in ring circles with a same MOS-Sidewall-Plate structure, and the upper rim portion of each deep trench is completely covered by the p-type semiconductor layer.

### Claim 6 (depends on 5)

The rectifier device of claim 5, wherein both the first deep trench and the second deep trench have an oxide coating on each of their sidewalls and bottom surfaces, and a polysilicon layer filling the centers of each of the first and second deep trenches and connected to the metal layer.

### Claim 7 (depends on 6)

The rectifier of claim 6, wherein the first deep trench is the outermost trench of the rectifier device and the second deep trench is the innermost trench of the rectifier device.

### Claim 8 (depends on 5)

The rectifier device of claim 5, wherein the first deep trench and the second deep trench are etched down to the first n-type semiconductor layer.

### Claim 9 (depends on 5)

The rectifier device of claim 5, further comprising a third continuous ring circle of the p-type semiconductor layer deposed between and in equal distance to the first ring circle and the second ring circle of the p-type semiconductor layer, and a third deep trench etched from top of the third p-type semiconductor ring circle down to bottom the second n-type semiconductor layer.

### Claim 10 (depends on 5)

The rectifier device of claim 5, wherein the first p-type semiconductor ring circle, second p-type semiconductor ring circle, the first deep trench, and the second deep trench are concentric rings.