# US 10,770,595 B2 · Thin film transistor, method for manufacturing the same, and display device

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- Number: US 10,770,595 B2
- Document ID: US10770595B2
- Status: Granted
- Kind: B2
- Application number: 16/427,743
- Filed: 2019-05-31
- Published: 2019-12-12
- Granted: 2020-09-08
- Earliest claimed: 2018-06-07
- Assignees: Boe Technology Group Co., Ltd.
- Applicants: Boe Technology Group Co., Ltd.
- Inventors: Xueyan Tian; Zunqing Song; Xiaolong Li
- Web page: https://patentgrep.com/patent/US10770595B2

## CPC

- H10D 30/6723: {having light shields}
- H10D 30/6731: {Top-gate only TFTs}
- H10D 30/0314: {of lateral top-gate TFTs comprising only a single gate}
- H10D 30/0321: {comprising silicon, e.g. amorphous silicon or polysilicon}
- H10D 30/6745: {Polycrystalline or microcrystalline silicon}
- H10D 86/421: {having a particular composition, shape or crystalline structure of the active layer}
- H10D 86/60: wherein the TFTs are in active matrices
- H10P 95/90: Thermal treatments, e.g. annealing or sintering
- H10K 59/1213: {the pixel elements being TFTs}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES

## Abstract

A thin film transistor, a method for manufacturing the same and a display device are provided in the present disclosure. The thin film transistor includes an active layer, a first electrode and a second electrode, and a gate electrode. The active layer includes an active layer body and an electrode hole in a center of the active layer body. The gate electrode is insulated and spaced apart from the active layer body and is disposed to surround the electrode hole. The first electrode and the second electrode are insulated from each other, both coupled to the active layer body, and insulated and spaced apart from the gate electrode. At least a portion of an orthographic projection of the first electrode on the active layer is within the electrode hole. An orthographic projection of the second electrode on the active layer surrounds the active layer body.

## Claims

### Claim 1

A thin film transistor, comprising:
a base substrate:
an active layer, comprising an active layer body and a through-hole in a center of the active layer body;
a gate electrode, insulated and spaced apart from the active layer body and surrounding the through-hole; and
a first electrode and a second electrode, both located at a side of the gate electrode distal to the base substrate; wherein the first electrode and the second electrode are insulated from each other, both coupled to the active layer body, and insulated and spaced apart from the gate electrode;
wherein at least a portion of an orthographic projection of the first electrode on the active layer is within the through-hole; and
an orthographic projection of the second electrode on the active layer surrounds the active layer body.

### Claim 2 (depends on 1)

The thin film transistor according to claim 1, wherein
the orthographic projection of the second electrode on the active layer is overlapped with an outer edge of the active layer body.

### Claim 3 (depends on 2)

The thin film transistor according to claim 2, further comprising a gate insulating layer on a surface of the active layer proximal to the gate electrode, wherein the gate electrode is on a surface of the gate insulating layer distal to the base substrate.

### Claim 4 (depends on 3)

The thin film transistor according to claim 3, further comprising an insulating spacer layer on a side of the gate insulating layer distal to the base substrate and covering the gate electrode,
wherein the first electrode and the second electrode are on a surface of the insulating spacer layer distal to the base substrate,
the first electrode is coupled to the active layer body via a first via-hole penetrating through both the insulating spacer layer and the gate insulating layer, and
the second electrode is coupled to the active layer body via a second via-hole penetrating through both the insulating spacer layer and the gate insulating layer.

### Claim 5 (depends on 4)

The thin film transistor according to claim 4, wherein
an orthographic projection of the through-hole on the base substrate has a circle shape;
an orthographic projection of the active layer body on the base substrate has an annular shape;
an orthographic projection of the first electrode on the base substrate has a circle shape; and
each of orthographic projections of the second electrode and the gate electrode on the base substrate has an annular shape.

### Claim 6 (depends on 5)

The thin film transistor according to claim 5, wherein
an orthographic projection of the first via-hole on the active layer has an annular shape and surrounds the through-hole; and
an orthographic projection of the second via-hole on the active layer has an annular shape and surrounds the through-hole.

### Claim 7 (depends on 6)

The thin film transistor according to claim 6, wherein
the first electrode, the gate electrode, and the second electrode are concentrical.

### Claim 8 (depends on 7)

The thin film transistor according to claim 7, wherein the active layer body is made of low temperature polysilicon.

### Claim 9 (depends on 8)

The thin film transistor according to claim 8, further comprising a light shielding layer on a side of the active layer proximal to the base substrate, wherein an orthographic projection of the active layer body on the light shielding layer is within the light shielding layer.

### Claim 10 (depends on 1)

A display device, comprising the thin film transistor according to claim 1.

### Claim 11

A method for manufacturing a thin film transistor, comprising:
providing a base substrate;
forming an active layer on a side of the base substrate, wherein the active layer comprises an active layer body and a through-hole in a center of the active layer body;
forming a gate electrode on a same side of the base substrate as the active layer, wherein the gate electrode is insulated and spaced apart from the active layer body and disposed to surround the through-hole; and
forming a first electrode and a second electrode both located on a side of the gate electrode distal to the base substrate, wherein the first electrode and the second electrode are insulated and spaced apart from each other, both coupled to the active layer body, and insulated and spaced apart from the gate electrode,
wherein at least a portion of an orthographic projection of the first electrode on the active layer is within the through-hole; and
an orthographic projection of the second electrode on the active layer surrounds the active layer body.

### Claim 12 (depends on 11)

The method according to claim 11, further comprising forming a gate insulating layer on a surface of the active layer proximal to the gate electrode, wherein the gate electrode is on a surface of the gate insulating layer distal to the base substrate.

### Claim 13 (depends on 12)

The method according to claim 12, after forming the gate electrode and before forming the first electrode and the second electrode, further comprising:
forming an insulating spacer layer, wherein the insulating spacer layer is on a side of the gate insulating layer distal to the base substrate and covers the gate electrode;
forming a first via-hole and a second via-hole both of which penetrate through both the insulating spacer layer and the gate insulating layer; and
filling a material of the first electrode into the first via-hole to form a first connection portion, and filling a material of the second electrode into the second via-hole to form a second connection portion,
wherein the first electrode is coupled to the active layer body via the first connection portion, and the second electrode is coupled to the active layer body via the second connection portion.

### Claim 14 (depends on 13)

The method according to claim 13, wherein
an orthographic projection of the first via-hole on the active layer has an annular shape and surrounds the through-hole; and
an orthographic projection of the second via-hole on the active layer has an annular shape and surrounds the through-hole.

### Claim 15 (depends on 14)

The method according to claim 14, before forming the active layer, further comprising:
forming a light shielding layer on a side of the active layer proximal to the base substrate, wherein an orthographic projection of the active layer body on the light shielding layer is within the light shielding layer.

### Claim 16 (depends on 15)

The method according to claim 15, wherein forming the active layer comprises:
forming an amorphous silicon layer;
performing an annealing process on the amorphous silicon layer to obtain a low temperature polysilicon layer;
performing a chemical mechanical polishing process on the low temperature polysilicon layer; and
performing a patterning process on the polished low temperature polysilicon layer to obtain the active layer.