# US 10,770,487 B2 · Method for manufacturing LTPS type TFT

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 10,770,487 B2
- Document ID: US10770487B2
- Status: Granted
- Kind: B2
- Application number: 16/086,019
- Filed: 2018-08-07
- Published: 2019-10-31
- Granted: 2020-09-08
- Earliest claimed: 2018-04-28
- Assignees: Wuhan China Star Optoelectronics Technology Co., Ltd.
- Applicants: Wuhan China Star Optoelectronics Technology Co., Ltd.
- Inventors: Juncheng Xiao; Chao Tian
- Web page: https://patentgrep.com/patent/US10770487B2

## CPC

- H10D 30/6733: {Multi-gate TFTs}
- H10D 86/441: {Interconnections, e.g. scanning lines}
- H10D 30/0314: {of lateral top-gate TFTs comprising only a single gate}
- H10D 30/0321: {comprising silicon, e.g. amorphous silicon or polysilicon}
- H10D 30/6715: {characterised by the doping profiles, e.g. having lightly-doped source or drain extensions}
- H10D 30/6723: {having light shields}
- H10D 30/6731: {Top-gate only TFTs}
- H10D 30/6745: {Polycrystalline or microcrystalline silicon}
- H10D 86/0221: {comprising manufacture, treatment or patterning of TFT semiconductor bodies}
- H10D 86/0231: {using masks, e.g. half-tone masks}
- H10D 86/421: {having a particular composition, shape or crystalline structure of the active layer}
- H10D 86/60: wherein the TFTs are in active matrices
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

The present disclosure provides an LTPS type TFT and a method for manufacturing the same. The TFT includes a first contact hole and a second contact hole, where the first contact hole and the second contact hole pass through the third insulating layer, the second insulating layer, and a portion of the first insulating layer, such that a portion of the heavily doped area is exposed. In addition, a transparent electrode is electrically connected to the source/drain electrode or the second gate electrode and a portion of the heavily doped area.

## Claims

### Claim 1

A method for manufacturing a low temperature poly silicon (LTPS) type thin film transistor (TFT), comprising steps of:
providing a substrate, and forming a silicon channel layer on the substrate;
forming a first insulating layer on the silicon channel layer;
forming a first gate electrode of the TFT on the first insulating layer;
performing an ion implantation on a portion of the silicon channel layer to form a doped area, wherein the doped area includes a lightly doped area and a heavily doped area, and the heavily doped area includes a first heavily doped area and a second heavily doped area;
forming a second insulating layer, a source/drain electrode, and a third insulating layer on the first gate electrode in sequence;
forming a first contact hole on the LTPS type TFT, wherein the first contact hole exposes a portion of the source/drain electrode and a portion of the first heavily doped area; and
forming a first transparent electrode on the third insulating layer, wherein the first transparent electrode is electrically connected to the portion of the source/drain electrode and the portion of the first heavily doped area via the first contact hole.

### Claim 2 (depends on 1)

The method for manufacturing the LTPS type TFT according to claim 1, wherein the step of forming the silicon channel layer on the substrate comprises:
providing the substrate, and forming a light-shielding film on the substrate;
patterning the light-shielding film to form a light-shielding layer;
forming a buffer layer on the light-shielding layer;
forming a silicon channel film on the buffer layer; and
patterning the silicon channel film to form the silicon channel layer.

### Claim 3 (depends on 1)

The method for manufacturing the LTPS type TFT according to claim 1, wherein the first contact hole passes through the third insulating layer, the second insulating layer, and a portion of the first insulating layer, such that the portion of the first heavily doped area and the portion of the source/drain electrode are exposed.

### Claim 4 (depends on 1)

The method for manufacturing the LTPS type TFT according to claim 1, wherein the LTPS type TFT further comprises a second gate electrode, and the second gate electrode and the first gate electrode are made of a same metal.

### Claim 5 (depends on 4)

The method for manufacturing the LTPS type TFT according to claim 4, wherein the LTPS type TFT further comprises a second contact hole, and the second contact hole passes through the third insulating layer, the second insulating layer, and a portion of the first insulating layer, such that a portion of the second heavily doped area and a portion of the second gate electrode are exposed.

### Claim 6 (depends on 5)

The method for manufacturing the LTPS type TFT according to claim 5, wherein the LTPS type TFT further comprises a second transparent electrode; and
wherein the second contact hole exposes the portion of the second gate electrode and the portion of the second heavily doped area, and the portion of the second gate electrode is electrically connected to the portion of second the heavily doped area via the second transparent electrode.

### Claim 7

A method for manufacturing a low temperature poly silicon (LTPS) type thin film transistor (TFT), comprising steps of:
providing a substrate and forming a silicon channel layer on the substrate;
forming a first insulating layer on the silicon channel layer;
forming a first gate electrode of the TFT on the first insulating layer;
performing an ion implantation on a portion of the silicon channel layer to form a doped area, and wherein the doped area includes a first doped area and a second doped area;
forming a second insulating layer, a source/drain electrode, and a third insulating layer on the first gate electrode in sequence;
forming a first contact hole on the LTPS type TFT, wherein the first contact hole exposes a portion of the source/drain electrode and a portion of the first doped area; and
forming a first transparent electrode on the third insulating layer, wherein the first transparent electrode is electrically connected to the portion of the source/drain electrode and the portion of the first doped area via the first contact hole.

### Claim 8 (depends on 7)

The method for manufacturing the LTPS type TFT according to claim 7, wherein the step of forming the silicon channel layer on the substrate comprises:
providing the substrate, and forming a light-shielding film on the substrate;
patterning the light-shielding film to form a light-shielding layer;
forming a buffer layer on the light-shielding layer;
forming a silicon channel film on the buffer layer; and
patterning the silicon channel film to form the silicon channel layer.

### Claim 9 (depends on 7)

The method for manufacturing the LTPS type TFT according to claim 7, wherein the first contact hole passes through the third insulating layer, the second insulating layer, and a portion of the first insulating layer, such that the portion of the first doped area and the portion of the source/drain electrode are exposed.

### Claim 10 (depends on 7)

The method for manufacturing the LTPS type TFT according to claim 7, wherein the LTPS type TFT further comprises a second gate electrode, and the second gate electrode and the first gate electrode are made of a same metal.

### Claim 11 (depends on 10)

The method for manufacturing the LTPS type TFT according to claim 10, wherein the LTPS type TFT further comprises a second contact hole, and the second contact hole passes through the third insulating layer, the second insulating layer, and a portion of the first insulating layer, such that a portion of the second doped area and a portion of the second gate electrode are exposed.

### Claim 12 (depends on 11)

The method for manufacturing the LTPS type TFT according to claim 11, wherein the LTPS type TFT further comprises a second transparent electrode; and
wherein the second contact hole exposes the portion of the second gate electrode and the portion of the second doped area, and the portion of the second gate electrode is electrically connected to the portion of the second doped area via the second transparent electrode.