# US 10,770,456 B2 · Semiconductor device

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- Number: US 10,770,456 B2
- Document ID: US10770456B2
- Status: Granted
- Kind: B2
- Application number: 16/258,480
- Filed: 2019-01-25
- Published: 2019-05-23
- Granted: 2020-09-08
- Earliest claimed: 2017-02-15
- Assignees: Fuji Electric Co., Ltd.
- Applicants: Fuji Electric Co., Ltd.
- Inventors: Soichi Yoshida; Hiroshi Miyata
- Web page: https://patentgrep.com/patent/US10770456B2

## CPC

- H10D 84/406: {Combinations of FETs or IGBTs with vertical BJTs and with one or more of diodes, resistors or capacitors}
- H10D 8/00: Diodes (variable-capacitance diodes H10D1/64; gated diodes H10D12/00)
- H10D 8/411: {PN diodes having planar bodies}
- H10D 8/50: PIN diodes
- H10D 12/481: {having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs}
- H10D 30/60: Insulated-gate field-effect transistors [IGFET] (H10D30/40 takes precedence)
- H10D 62/105: {by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] (IGFETs having LDD or drain extension regions H10D30/601)}
- H10D 62/127: {of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs}
- H10D 62/133: {Emitter regions of BJTs}
- H10D 62/141: {Anode or cathode regions of thyristors; Collector or emitter regions of gated bipolar-mode devices, e.g. of IGBTs}
- H10D 62/142: {Anode regions of thyristors or collector regions of gated bipolar-mode devices}
- H10D 62/177: {Base regions of bipolar transistors, e.g. BJTs or IGBTs}
- H10D 62/393: {Body regions of DMOS transistors or IGBTs (cell layout of DMOS H10D62/127)}
- H10D 62/53: the imperfections being within the semiconductor body
- H10D 64/112: {comprising multiple field plate segments}
- H10D 64/117: {Recessed field plates, e.g. trench field plates or buried field plates}
- H10D 64/23: Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
- H10D 64/231: {Emitter or collector electrodes for bipolar transistors}
- H10D 64/519: {characterised by their top-view geometrical layouts}
- H10P 30/204: {into Group IV semiconductors}
- H10P 30/208: {of electrically inactive species}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device including a semiconductor substrate is provided. The semiconductor substrate includes a transistor region, and the transistor region includes a drift region, a plurality of trench portions, a plurality of emitter regions and a plurality of contact regions, and an accumulation region provided between the drift region and the plurality of emitter regions in a depth direction, and having a higher first-conductivity-type doping concentration than the drift region. A first outermost contact region is an outermost one of the plurality of contact regions in a direction parallel to the first direction, and a length of the first outermost contact region in the first direction is longer than a length in the first direction of one contact region of the plurality of contact regions other than the first outermost contact region, and the accumulation region terminates at a position below the first outermost contact region.

## Claims

### Claim 1

A semiconductor device including a semiconductor substrate,
the semiconductor substrate having a transistor region,
the transistor region comprising:
a first-conductivity-type drift region;
a plurality of trench portions extending from a front surface of the semiconductor substrate in a depth direction to reach the drift region and extending in a first direction on the front surface;
a plurality of first-conductivity-type emitter regions and a plurality of second-conductivity-type contact regions provided above the drift region and each having an upper surface exposed on the front surface, the plurality of emitter regions and the plurality of contact regions being alternately arranged next to each other in the first direction between two adjacent trench portions of the plurality of trench portions; and
an accumulation region provided between the drift region and the plurality of emitter regions in the depth direction, and having a higher first-conductivity-type doping concentration than the drift region,
wherein a first outermost contact region is an outermost one of the plurality of contact regions in a direction parallel to the first direction, and is longer in the first direction than one contact region of the plurality of contact regions other than the first outermost contact region, and
the accumulation region terminates at a position below the first outermost contact region.

### Claim 2 (depends on 1)

The semiconductor device according to claim 1,
wherein the accumulation region extends in the direction parallel to the first direction and terminates before reaching a middle position of the first outermost contact region in the first direction.

### Claim 3 (depends on 1)

The semiconductor device according to claim 1,
wherein a length in the first direction of the first outermost contact region is 10 times or more longer than a length in the first direction of the one contact region of the plurality of contact regions other than the first outermost contact region.

### Claim 4 (depends on 1)

The semiconductor device according to claim 1, further comprising an interlayer dielectric film provided on the front surface of the semiconductor substrate,
wherein a contact hole provided in the interlayer dielectric film is positioned on the plurality of contact regions and the plurality of emitter regions and extends in the first direction to reach a region above the first outermost contact region.

### Claim 5 (depends on 1)

The semiconductor device according to claim 1,
wherein the semiconductor substrate includes a base region that is provided more outside than the first outermost contact region in the direction parallel to the first direction and that has a lower second-conductivity-type doping concentration than the first outermost contact region, and
a length in the first direction of the base region is 10 times or more longer than a length in the first direction of the one contact region of the plurality of contact regions other than the first outermost contact region.

### Claim 6 (depends on 1)

The semiconductor device according to claim 1, wherein the semiconductor substrate comprises a diode region adjacent to the transistor region in a second direction orthogonal to the first direction in the front surface of the semiconductor substrate,
the diode region includes a boundary dummy trench portion that is a different trench portion than the plurality of trench portions, and the boundary dummy trench portion is positioned in a boundary region between the transistor region and the diode region and includes a dummy conductive portion to receive an emitter potential fed thereto,
the plurality of trench portions includes (i) a plurality of dummy trench portions each having a dummy conductive portion to receive the emitter potential fed thereto and (ii) a plurality of gate trench portions each having a gate conductive portion to receive a gate potential fed thereto, and
the accumulation region extends in the second direction from the transistor region to the diode region, and terminates in the boundary dummy trench portion or in a region between the boundary dummy trench portion and a first dummy trench portion of the plurality of dummy trench portions that is the closest to the boundary dummy trench portion.

### Claim 7 (depends on 6)

The semiconductor device according to claim 6,
wherein the semiconductor substrate further includes, in a boundary mesa region between the boundary dummy trench portion and the first dummy trench portion, a second-conductivity-type expansion contact region that does not have the plurality of emitter regions and that extends longer in the direction parallel to the first direction extends than the plurality of contact regions.

### Claim 8 (depends on 6)

The semiconductor device according to claim 6,
wherein the drift region includes a first defect region positioned closer to the accumulation region than to a back surface of the semiconductor substrate in the depth direction, the first defect region extends in a direction parallel to the second direction across the diode region and a part of the transistor region, and the first defect region is designed to shorten a lifetime of a carrier.

### Claim 9 (depends on 6)

The semiconductor device according to claim 6,
wherein the diode region of the semiconductor substrate includes a high-concentration contact region that is provided at a shallower position than the plurality of contact regions in the depth direction, and the high-concentration contact region has a higher second-conductivity-type doping concentration than the plurality of contact regions.

### Claim 10 (depends on 1)

The semiconductor device according to claim 1,
wherein the semiconductor substrate includes a base region that is positioned more outside than the first outermost contact region in the direction parallel to the first direction and that has a lower second-conductivity-type doping concentration than the first outermost contact region, and
in the direction parallel to the first direction, a length of the base region is shorter than a length of the first outermost contact region.

### Claim 11 (depends on 1)

The semiconductor device according to claim 1,
wherein, in the direction parallel to the first direction in the transistor region, a length La between an outer end portion of the first outermost contact region and an outer end portion of a contact hole provided in an interlayer dielectric film and positioned on the first outermost contact region is shorter than a length Lb between the outer end portion of the contact hole positioned on the first outermost contact region and an outer end portion of the accumulation region in the direction parallel to the first direction.

### Claim 12 (depends on 1)

The semiconductor device according to claim 1,
wherein a diode region is adjacent to the transistor region in a second direction orthogonal to the first direction in the front surface of the semiconductor substrate and includes a cathode region that is exposed on a back surface of the semiconductor substrate, and
in the direction parallel to the first direction, a length L1c between an outer end portion of the cathode region and an inner end portion of the first outermost contact region is longer than a length L15 of the first outermost contact region.

### Claim 13 (depends on 1)

The semiconductor device according to claim 1,
wherein the semiconductor substrate comprises a diode region that is adjacent to the transistor region in a second direction orthogonal to the first direction in the front surface of the semiconductor substrate,
the diode region comprises:
a first-conductivity-type drift region;
a second-conductivity-type base region;
an accumulation region provided between the drift region and the base region in the depth direction and having a higher first-conductivity-type doping concentration than the drift region; and
a boundary dummy trench portion that is a different trench portion than the plurality of trench portions, the boundary dummy trench portion being positioned in a boundary region between the transistor region and the diode region and having a dummy conductive portion to receive an emitter potential fed thereto, and
the accumulation region in the diode region and a boundary mesa region in contact with the boundary dummy trench portion is positioned more outside in the first direction than the accumulation region in the transistor region excluding the boundary mesa region.

### Claim 14 (depends on 13)

The semiconductor device according to claim 13,
wherein the diode region includes a second outermost contact region that is positioned more outside than the base region in the direction parallel to the first direction and that has a higher second-conductivity-type doping concentration than the base region, and
the accumulation region in the diode region and the boundary mesa region is positioned more outside than the second outermost contact region in the direction parallel to the first direction.

### Claim 15 (depends on 14)

The semiconductor device according to claim 14,
wherein in the direction parallel to the first direction, an outer end portion of the second outermost contact region is positioned more outside than an outer end portion of the first outermost contact region, and
in the direction parallel to the first direction, a length L15′ of the second outermost contact region is longer than the length L15 of the first outermost contact region.

### Claim 16 (depends on 15)

The semiconductor device according to claim 15,
wherein the diode region includes a cathode region that is exposed on a back surface of the semiconductor substrate, and
in the direction parallel to the first direction, a length L1c from an outer end portion of the cathode region to an inner end portion of the second outermost contact region is longer than the length L15′ of the second outermost contact region.

### Claim 17 (depends on 14)

The semiconductor device according to claim 14,
wherein in the direction parallel to the first direction, a length Lc′ from an inner end portion of the second outermost contact region to an outer end portion of the accumulation region in the diode region is larger than a length Lc, in the direction parallel to the first direction, from an inner end portion of the first outermost contact region to the outer end portion of the accumulation region in the transistor region excluding the boundary mesa region.
