# US 10,770,415 B2 · Packaged transistor devices with input-output isolation and methods of forming packaged transistor devices with input-output isolation

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- Number: US 10,770,415 B2
- Document ID: US10770415B2
- Status: Granted
- Kind: B2
- Application number: 16/208,821
- Filed: 2018-12-04
- Published: 2020-06-04
- Granted: 2020-09-08
- Earliest claimed: 2018-12-04
- Assignees: Cree, Inc.
- Applicants: Cree, Inc.
- Inventors: Frank Trang; Haedong Jang; Zulhazmi Mokhti
- Web page: https://patentgrep.com/patent/US10770415B2

## CPC

- H10W 44/20: at high-frequency [HF] or radio frequency [RF]
- H03H 7/38: Impedance-matching networks
- H10W 42/20: protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
- H10W 44/00: Electrical arrangements for controlling or matching impedance
- H10W 72/075: {of bond wires}
- H10W 74/016: {using moulds}
- H10W 74/124: {the encapsulations having cavities other than that occupied by chips}
- H10W 44/206: {Wires}
- H10W 44/234: {Arrangements for impedance matching}
- H10W 72/5366: {the bond wires having kinks}
- H10W 72/5445: {being orthogonal to a side surface of the chip, e.g. parallel arrangements}
- H10W 90/759: {between a chip and a laterally-adjacent discrete passive device}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H03H: IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS (waveguides, resonators, lines or other devices of the waveguide type H01P)

## Abstract

Packaged transistor devices are provided that include a transistor on a base of the packaged transistor device, the transistor comprising a control terminal and an output terminal, a first bond wire electrically coupled between an input lead and the control terminal of the transistor, a second bond wire electrically coupled between an output lead and the output terminal of the transistor, and an isolation material that is and physically between the first bond wire and the second bond wire, wherein the isolation material is configured to reduce a coupling between the first bond wire and the second bond wire.

## Claims

### Claim 1

A packaged transistor device, comprising:
an input lead;
an output lead;
a transistor comprising a control terminal and an output terminal;
a first bond wire electrically coupled between the input lead and the control terminal of the transistor;
a second bond wire electrically coupled between the output lead and the output terminal of the transistor; and
an isolation material that is physically between the first bond wire and the second bond wire, wherein the isolation material is configured to reduce a coupling between the first bond wire and the second bond wire.

### Claim 2 (depends on 1)

The packaged transistor device of claim 1, wherein the isolation material is a magnetic isolation material, a dielectric isolation material, or a conductive isolation material that is physically separated from the first bond wire and the second bond wire.

### Claim 3 (depends on 1)

The packaged transistor device of claim 1, further comprising a package that houses the transistor, with the input lead and the output lead extending from the package,
wherein the package comprises an air cavity, and
wherein at least a portion of the first bond wire and at least a portion of the second bond wire extend into the air cavity.

### Claim 4 (depends on 1)

The packaged transistor device of claim 1, further comprising a package that houses the transistor, with the input lead and the output lead extending from the package.

### Claim 5 (depends on 1)

The packaged transistor device of claim 1, wherein the isolation material is disposed above the transistor.

### Claim 6 (depends on 1)

The packaged transistor device of claim 1, wherein the isolation material comprises a plurality of third bond wires,
wherein a first portion of a first one of the third bond wires extends above the transistor at a first height, and
wherein a second portion of a second one of the third bond wires extends above the transistor at a second height that is greater than the first height.

### Claim 7 (depends on 1)

The packaged transistor device of claim 1, wherein the isolation material comprises a plurality of metal segments.

### Claim 8 (depends on 1)

The packaged transistor device of claim 1, wherein the isolation material is configured to be connected to a ground signal.

### Claim 9 (depends on 1)

The packaged transistor device of claim 1, further comprising a package that houses the transistor, with an input lead and an output lead extending from the package,
wherein the input lead is connected to the control terminal and the output lead is connected to the output terminal,
wherein the package comprises an air cavity, and
wherein at least a portion of the first bond wire and at least a portion of the second bond wire extend into the air cavity.

### Claim 10

A packaged transistor device, comprising:
a base;
a transistor on the base, the transistor comprising a control terminal and an output terminal on opposite sides of the transistor;
a first inductor connected to the control terminal, the first inductor comprising a first portion that extends at a first level that is farther from the base than a top surface of the transistor;
a second inductor connected to the output terminal, the second inductor comprising a second portion that extends at a second level that is farther from the base than the top surface of the transistor; and
an isolation material that is between the first portion and the second portion, wherein the isolation material is configured to reduce a coupling between the first inductor and the second inductor.

### Claim 11 (depends on 10)

The packaged transistor device of claim 10, wherein the isolation material is a conductive isolation material that is physically separate from the first inductor and the second inductor, and
wherein the isolation material is electrically connected to a reference signal.

### Claim 12 (depends on 10)

The packaged transistor device of claim 10, further comprising a package that houses the transistor, with an input lead and an output lead extending from the package, and
wherein the input lead is connected to the control terminal and the output lead is connected to the output terminal.

### Claim 13 (depends on 10)

The packaged transistor device of claim 10, wherein the isolation material comprises a plurality of bond wires.

### Claim 14 (depends on 10)

The packaged transistor device of claim 10, wherein the isolation material is disposed above the transistor.

### Claim 15 (depends on 10)

The packaged transistor device of claim 10, wherein the isolation material comprises a plurality of metal segments, and
wherein the plurality of metal segments extend in a direction substantially perpendicular to a top surface of the transistor.

### Claim 16

A method of manufacturing a packaged transistor device comprising:
providing a transistor comprising a control terminal and an output terminal on opposite sides of the transistor;
connecting a first bond wire to the control terminal;
connecting a second bond wire to the output terminal;
placing an isolation material on the transistor between the first bond wire and the second bond wire, wherein the isolation material is configured to reduce a coupling between the first bond wire and the second bond wire; and
providing a package to enclose the transistor, the first bond wire, the second bond wire, and the isolation material.

### Claim 17 (depends on 16)

The method of claim 16, wherein placing the isolation material on the transistor comprises providing a plurality of third bond wires between the first bond wire and the second bond wire.

### Claim 18 (depends on 16)

The method of claim 16, wherein providing the package comprises placing a polymer material on the transistor,
wherein placing the isolation material on the transistor comprises recessing the polymer material, and
wherein recessing the polymer material comprises:
providing a plurality of recesses into the polymer material; and
providing a metal material into the plurality of recesses.

### Claim 19 (depends on 16)

The method of claim 16, wherein providing the package comprises placing a polymer material on the transistor,
wherein placing the isolation material on the transistor comprises recessing the polymer material, and
wherein recessing the polymer material comprises:
providing a trench that extends on the transistor into the polymer material; and
providing a metal material into the trench.

### Claim 20 (depends on 16)

The method of claim 16, wherein the isolation material is a conductive isolation material that is physically separate from the first bond wire and the second bond wire, and
wherein the isolation material is configured to be connected to a ground signal.