# US 10,770,412 B2 · Guard ring for photonic integrated circuit die

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- Number: US 10,770,412 B2
- Document ID: US10770412B2
- Status: Granted
- Kind: B2
- Application number: 16/109,867
- Filed: 2018-08-23
- Published: 2020-02-27
- Granted: 2020-09-08
- Earliest claimed: 2018-08-23
- Assignees: Globalfoundries Inc.
- Applicants: Globalfoundries Inc.
- Inventors: Nicholas A. Polomoff; Andreas D. Stricker; Anupam I Arora
- Web page: https://patentgrep.com/patent/US10770412B2

## CPC

- H10W 42/00: Arrangements for protection of devices (arrangements for thermal protection H10W40/00)
- G02B 6/12004: {Combinations of two or more optical elements}
- G02B 6/305: {and having an integrated mode-size expanding section, e.g. tapered waveguide}
- G02B 6/4268: {Cooling (of instruments G12B15/00; of electric apparatus H05K7/20; of semiconductor devices H10W76/47)}
- G02B 6/4277: {Protection against electromagnetic interference [EMI], e.g. shielding means (shielding of electric apparatus H05K9/00, of instruments G12B17/00)}
- H10W 20/42: Vias, e.g. via plugs
- H10W 20/43: Layouts of interconnections
- H10W 42/121: {protecting against mechanical damage (H10W76/00, H10W74/00 take precedence)}
- G02B 6/3652: {the additional structures being prepositioning mounting areas, allowing only movement in one dimension, e.g. grooves, trenches or vias in the microbench surface, i.e. self aligning supporting carriers}
- G02B 6/4206: {Optical features (G02B6/4207, G02B6/421 take precedence)}
- G02B 6/4249: {comprising arrays of active devices and fibres}
- G02B 2006/12104: {Mirror; Reflectors or the like}
- H10W 72/242: {relative to the surface, e.g. recessed, protruding}
- H10W 72/244: {relative to underlying supporting features, e.g. bond pads, RDLs or vias}
- H10W 72/29: Bond pads specially adapted therefor
- H10W 72/90: Bond pads, in general
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- G02B: OPTICAL ELEMENTS, SYSTEMS OR APPARATUS

## Abstract

Embodiments of the disclosure provide a photonic integrated circuit (PIC) die including: a semiconductor substrate; active circuitry on the semiconductor substrate; an inter-level dielectric (ILD) over the semiconductor substrate and the active circuitry; a photonic element extending from the active circuitry on the semiconductor substrate; and a guard ring on the semiconductor substrate and within the ILD, the guard ring surrounding the active circuitry, the guard ring including: a conductive body, and a conductive bridge element extending over the photonic element.

## Claims

### Claim 1

A photonic integrated circuit (PIC) die, comprising:
a semiconductor substrate;
active circuitry on the semiconductor substrate;
an inter-level dielectric (ILD) over the semiconductor substrate and the active circuitry;
a photonic element extending from the active circuitry on the semiconductor substrate;
a guard ring on the semiconductor substrate and within the ILD, the guard ring surrounding the active circuitry, the guard ring including:
a conductive body, and
a conductive bridge element extending over the photonic element, wherein the conductive bridge element includes a first via coupled to a first terminal segment of the conductive body, a second via coupled to a second terminal segment of the conductive body, and a bridge wire coupling the first and second vias, the bridge wire extending over the photonic element;
a grounding via within the ILD coupled to the conductive body; and
a solder bump on the grounding via, wherein the grounding via electrically couples the guard ring to the solder bump, and wherein the first or second terminal segment of the conductive body is coupled to the grounding via through the bridge wire.

### Claim 2 (depends on 1)

The PIC die of claim 1, wherein the guard ring includes a light-reflecting metal.

### Claim 3 (depends on 1)

The PIC die of claim 1, wherein a horizontal separation distance between one of the first and second terminal segments and the photonic element is at least two micrometers (μm).

### Claim 4 (depends on 1)

The PIC die of claim 1, wherein the first and second vias extend vertically through a plurality of intermediate metal levels within the ILD.

### Claim 5 (depends on 1)

The PIC die of claim 1, wherein a horizontal length of the bridge wire between the first and second terminal end segments is at least nine micrometers (μm).

### Claim 6 (depends on 1)

The PIC die of claim 1, wherein the guard ring is electrically grounded through a grounding pathway made through the semiconductor substrate.

### Claim 7 (depends on 1)

The PIC die of claim 1, wherein the conductive bridge element is horizontally situated between the active circuitry and a kerf region of the PIC die.

### Claim 8 (depends on 7)

The PIC die of claim 7, further comprising a crack stop structure horizontally between the kerf region of the PIC die and the conductive bridge element.

### Claim 9

A photonic integrated circuit (PIC) die, comprising:
a semiconductor substrate;
active circuitry on the semiconductor substrate;
an inter-level dielectric (ILD) over the semiconductor substrate and the active circuitry;
a photonic element extending from the active circuitry on the semiconductor substrate;
a guard ring on the semiconductor substrate and within the ILD, the guard ring surrounding the active circuitry, the guard ring including:
a plurality of conductive bodies on the semiconductor substrate, each having a first terminal segment and an opposing second terminal segment,
a first via coupled to the first terminal segment of a first one of the plurality of conductive bodies;
a second via coupled to the second terminal segment of a second one of the plurality of conductive bodies, and
a bridge wire coupling the first and second vias, the bridge wire extending above and across the photonic element;
a grounding via within the ILD coupled to the first one of the plurality of conductive bodies; and
a solder bump on the grounding via, wherein the grounding via electrically couples the guard ring to the solder bump, and wherein the second one of the plurality of conductive bodies is coupled to the grounding via and the first one of the plurality of conductive bodies through the bridge wire.

### Claim 10 (depends on 9)

The PIC die of claim 9, wherein the first and second vias extend vertically through a plurality of intermediate metal levels within the ILD.

### Claim 11 (depends on 9)

The PIC die of claim 9, wherein the guard ring is electrically grounded through a grounding pathway made through the semiconductor substrate.

### Claim 12 (depends on 9)

The PIC die of claim 9, further comprising a crack stop structure horizontally between a kerf region of the PIC die and the guard ring.

### Claim 13

A photonic integrated die (PIC) structure, comprising:
a semiconductor substrate;
active circuitry on the semiconductor substrate;
an inter-level dielectric (ILD) over the semiconductor substrate and the active circuitry;
a plurality of photonic elements on the semiconductor substrate extending from the active circuitry to an exterior sidewall of the PIC die;
a guard ring on the semiconductor substrate and within the ILD, the guard ring surrounding the active circuitry, the guard ring including:
a plurality of conductive bodies on the semiconductor substrate, each having a first terminal segment and an opposing second terminal segment, and
a plurality of conductive bridge elements, each conductive bridge element including:
a first via coupled to the first terminal segment of one of the plurality of conductive bodies;
a second via coupled to the second terminal segment of one of the plurality of conductive bodies, and
a bridge wire coupling the first and second vias, the bridge wire extending over the photonic element;
a grounding via within the ILD coupled to a selected one of the plurality of conductive bodies; and
a solder bump on the grounding via, wherein the grounding via electrically couples the guard ring to the solder bump, and wherein at least one of the plurality of conductive bodies is coupled to the grounding via and the selected one of the plurality of conductive bodies through the bridge wire of one of the plurality of conductive bridge elements.

### Claim 14 (depends on 13)

The PIC die of claim 13, wherein the guard ring includes a light-reflecting metal.

### Claim 15 (depends on 13)

The PIC die of claim 13, wherein the guard ring is electrically grounded through a grounding pathway made through the semiconductor substrate.

### Claim 16 (depends on 13)

The PIC die of claim 13, further comprising a crack stop structure horizontally between a kerf region of the PIC die and the guard ring.