# US 10,770,402 B2 · Integrated fan-out package > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,770,402 B2 - Document ID: US10770402B2 - Status: Granted - Kind: B2 - Application number: 16/396,794 - Filed: 2019-04-29 - Published: 2019-08-15 - Granted: 2020-09-08 - Earliest claimed: 2016-07-21 - Assignees: Taiwan Semiconductor Manufacturing Company, Ltd. - Applicants: Taiwan Semiconductor Manufacturing Co., Ltd. - Inventors: Ming-Yen Chiu; Ching-Fu Chang; Hsin-Chieh Huang - Web page: https://patentgrep.com/patent/US10770402B2 ## CPC - H10W 70/614: {the multiple chips being integrally enclosed} - H10D 1/20: Inductors - H10P 72/74: {using temporarily an auxiliary support} - H10W 44/20: at high-frequency [HF] or radio frequency [RF] - H10W 74/129: {forming a chip-scale package [CSP]} - H10F 39/804: {Containers or encapsulations} - H10P 72/743: {used as a support during manufacture of interconnect decals or build up layers} - H10W 20/423: {Shielding layers} - H10W 44/248: {for antennas} - H10W 70/60: Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) - H10W 70/655: Fan-out layouts - H10W 72/0198: {batch processes} - H10W 72/241: {Dispositions, e.g. layouts} - H10W 72/9413: {on encapsulations} - H10W 74/014: {using batch processing} - H10W 74/019: {using temporary auxiliary substrates (H10W74/017 takes precedence)} - H10W 74/117: {the substrate having spherical bumps for external connection} - H10W 90/00: Package configurations - H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 - H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION ## Abstract An integrated fan-out package including an integrated circuit, an insulating encapsulation, and a redistribution circuit structure is provided. The integrated circuit includes an antenna region. The insulating encapsulation encapsulates the integrated circuit. The redistribution circuit structure is disposed on the integrated circuit and the insulating encapsulation. The redistribution circuit structure is electrically connected to the integrated circuit, and the redistribution circuit structure includes a redistribution region and a dummy region including a plurality of dummy patterns embedded therein, wherein the antenna region includes an inductor and a wiring-free dielectric portion, and the wiring-free dielectric portion of the antenna region is between the inductor and the dummy region. ## Claims ### Claim 1 A package, comprising: an integrated circuit comprising an antenna region; an insulating encapsulation encapsulating the integrated circuit; and a redistribution circuit structure disposed on the integrated circuit and the insulating encapsulation, the redistribution circuit structure being electrically connected to the integrated circuit, and the redistribution circuit structure comprising a redistribution region and a dummy region comprising a plurality of dummy patterns embedded therein, wherein the antenna region comprises an inductor and a wiring-free dielectric portion, and the wiring-free dielectric portion of the antenna region is between the inductor and the dummy region. ### Claim 2 (depends on 1) The package as claimed in claim 1, wherein the antenna region abuts the dummy region. ### Claim 3 (depends on 1) The package as claimed in claim 1, wherein the redistribution region of the redistribution circuit structure comprises a plurality of redistribution wirings embedded therein, and the redistribution wirings are electrically insulated from the dummy patterns. ### Claim 4 (depends on 1) The package as claimed in claim 1, wherein the dummy patterns are electrically floated. ### Claim 5 (depends on 1) The package as claimed in claim 1 further comprising a plurality of through insulator vias embedded in the insulating encapsulation and electrically connected to the redistribution circuit structure. ### Claim 6 (depends on 1) The package as claimed in claim 1 further comprising: a plurality of conductive terminals disposed on and electrically connected to the redistribution circuit structure. ### Claim 7 A package, comprising: an integrated circuit comprising a semiconductor substrate and an interconnection structure covering the semiconductor substrate; an insulating encapsulation encapsulating the integrated circuit; and a redistribution circuit structure disposed on the integrated circuit and the insulating encapsulation, the redistribution circuit structure being electrically connected to the integrated circuit, and the redistribution circuit structure comprising a dummy region comprising a first dielectric stack and dummy patterns distributed in the first dielectric stack, wherein the interconnection structure comprises an inductor and a wiring-free dielectric portion, the wiring-free dielectric portion comprises a plurality of dielectric layers having no conductive layer distributed therein, the inductor is sandwiched between the wiring-free dielectric portion and the semiconductor substrate, and the topmost dielectric layer among the dielectric layers is in contact with the wiring-free dielectric portion. ### Claim 8 (depends on 7) The package as claimed in claim 7, wherein the wiring-free dielectric portion abuts the dummy region. ### Claim 9 (depends on 7) The package as claimed in claim 7, wherein the wiring-free dielectric portion is between the inductor and the dummy region. ### Claim 10 (depends on 7) The package as claimed in claim 7, wherein the redistribution circuit structure further comprises a second dielectric stack and a plurality of redistribution conductive layers distributed in the second dielectric stack. ### Claim 11 (depends on 7) The package as claimed in claim 7, wherein the wiring-free dielectric portion is in contact with the dummy region. ### Claim 12 (depends on 7) The package as claimed in claim 7, wherein the dummy patterns are electrically floated. ### Claim 13 A package, comprising: an integrated circuit comprising an antenna region; an insulating encapsulation encapsulating the integrated circuit; and a redistribution circuit structure disposed on the integrated circuit and the insulating encapsulation, the redistribution circuit structure being electrically connected to the integrated circuit, the redistribution circuit structure comprising a plurality of dielectric layers and a plurality of redistribution conductive layers stacked alternately, the redistribution conductive layers comprising a plurality of redistribution wirings and a plurality of dummy patterns, and the plurality of dummy patterns are located above the antenna region. ### Claim 14 (depends on 13) The package as claimed in claim 13, wherein the integrated circuit comprises a semiconductor substrate and an interconnection structure covering the semiconductor substrate, the interconnection structure comprises a wiring-free dielectric portion and an inductor covered by the wiring-free dielectric portion, the wiring-free dielectric portion and the inductor are corresponding to the antenna region. ### Claim 15 (depends on 14) The package as claimed in claim 14, wherein the inductor is entirely covered by the wiring-free dielectric portion. ### Claim 16 (depends on 14) The package as claimed in claim 14, wherein the dummy patterns are disposed above the wiring-free dielectric portion. ### Claim 17 (depends on 3) The package as claimed in claim 3, wherein the dummy patterns are electrically floated. ### Claim 18 (depends on 13) The package as claimed in claim 13, wherein the dummy patterns comprise a plurality of mesh patterns electrically insulated from one another. ### Claim 19 (depends on 13) The package as claimed in claim 13 further comprising: a plurality of through insulator vias embedded in the insulating encapsulation and electrically connected to the redistribution circuit structure. ### Claim 20 (depends on 13) The package as claimed in claim 13 further comprising: a plurality of conductive terminals disposed on and electrically connected to the redistribution circuit structure.