# US 10,770,386 B2 · Wiring board, electronic device, and wiring board manufacturing method > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,770,386 B2 - Document ID: US10770386B2 - Status: Granted - Kind: B2 - Application number: 16/124,730 - Filed: 2018-09-07 - Published: 2019-01-10 - Granted: 2020-09-08 - Earliest claimed: 2016-03-28 - Assignees: Fujitsu Interconnect Technologies Limited - Applicants: Fujitsu Limited - Inventors: Toshiki Iwai; Daisuke Mizutani - Web page: https://patentgrep.com/patent/US10770386B2 ## CPC - H10W 70/65: Shapes or dispositions of interconnections - H05K 3/28: Applying non-metallic protective coatings {(H05K3/0091 takes precedence; methods for intermediate insulating layers for build-up multilayer circuits H05K3/4673)} - H10W 70/05: of insulating or insulated package substrates, or of interposers, or of redistribution layers (manufacture or treatment of leadframes H10W70/04) - H10W 70/685: comprising multiple insulating layers - H10W 70/687: {characterized by the outer layers being for protection, e.g. solder masks, or for protection against chemical or mechanical damage} - H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts} - H05K 1/0298: {Multilayer circuits} - H05K 1/115: {Via connections; Lands around holes or via connections (H05K1/112 takes precedence)} - H05K 3/3436: {having an array of bottom contacts, e.g. pad grid array or ball grid array components} - H05K 2201/0175: Inorganic, non-metallic layer, e.g. resist or dielectric for printed capacitor - H05K 2203/041: Solder preforms in the shape of solder balls - H10W 70/095: {of vias therein} - H10W 70/635: {Through-vias} - H10W 72/072: {of bump connectors} - H10W 72/07236: {Soldering or alloying} - H10W 72/241: {Dispositions, e.g. layouts} - H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu} - H10W 72/255: {of outermost layers of multilayered bumps, e.g. material of a coating} - H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ## Abstract A wiring board includes: an insulating layer that includes a first surface over which an electronic component is mounted and a second surface opposite to the first surface; a conductive layer that is disposed on the second surface; a via that is provided inside a first through-hole that penetrates a portion between the first surface and the second surface of the insulating layer; an electrode that is disposed on the first surface and connected to the via; and a glass plate that is not contact with the conductive layer and is disposed on the first surface and includes a second through-hole through which the electrode is disposed. ## Claims ### Claim 1 A wiring board comprising: a first insulating layer that includes a first surface over which an electronic component is mounted and a second surface opposite to the first surface; a conductive layer that is disposed on the second surface; a via that is provided inside a first through-hole that penetrates a portion between the first surface and the second surface of the insulating layer; an electrode that is disposed on the first surface and connected to the via; and a glass plate that is not in contact with the conductive layer or the electrode and is disposed on the first surface and includes a second through-hole through which the electrode is disposed. ### Claim 2 (depends on 1) The wiring board of claim 1, wherein the electrode is smaller than an opening of the second through-hole in a planar view. ### Claim 3 (depends on 2) The wiring board of claim 2, wherein the second through-hole includes an annular convex portion protruding in a tapered shape on an inner side of the opening along the opening so as to be an opening diameter smaller than those of the first through-hole and the second through-hole between a first opening in the first surface and a second opening in the second surface. ### Claim 4 (depends on 1) The wiring board of claim 1, wherein the second through-hole has a truncated cone shape in which a first opening in the first surface is greater than a second opening in the second surface or the first opening in the first surface is smaller than the second opening in the second surface between the first surface and the second surface. ### Claim 5 An electronic device comprising: a wiring board; and an electronic component that is mounted over the wiring board, the wiring board includes a first insulating layer including a first surface over which the electronic component is mounted, and a second surface opposite to the first surface, a conductive layer that is disposed on the second surface, a via that is disposed inside a first through-hole penetrating a portion between the first surface and the second surface of the insulating layer, an electrode that is disposed on the first surface and connected to the via, and a glass plate that is not in contact with the conductive layer or the electrode and is disposed on the first surface and includes a second through-hole through which the electrode is disposed. ### Claim 6 (depends on 1) The wiring board of claim 1 wherein the conductive layer extends at least partially into a second insulating layer. ### Claim 7 (depends on 5) The electronic device of claim 5 wherein the conductive layer extends at least partially into a second insulating layer.