# US 10,770,378 B1 · Isolated component design > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,770,378 B1 - Document ID: US10770378B1 - Status: Granted - Kind: B1 - Application number: 16/401,828 - Filed: 2019-05-02 - Granted: 2020-09-08 - Earliest claimed: 2019-05-02 - Assignees: Texas Instruments Incorporated - Applicants: Texas Instruments Incorporated - Inventors: Enis Tuncer - Web page: https://patentgrep.com/patent/US10770378B1 ## CPC - H10W 70/411: {Chip-supporting parts, e.g. die pads} - H10W 70/435: {of insulating layers on leadframes, e.g. bridging members} - H10W 70/421: {Shapes or dispositions} - H10W 70/481: {for devices being provided for in groups H10D8/00 - H10D48/00} - H10W 90/811: {Multiple chips on leadframes} - H10W 72/5445: {being orthogonal to a side surface of the chip, e.g. parallel arrangements} - H10W 72/5449: {not being orthogonal to a side surface of the chip, e.g. fan-out arrangements} - H10W 72/932: {Plan-view shape, i.e. in top view} - H10W 90/753: {between laterally-adjacent chips} - H10W 90/756: {between a chip and a stacked lead frame, conducting package substrate or heat sink} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract A microelectronic device includes a first conductor and a second conductor, separated by a lateral spacing. The first conductor has a low field contour facing the second conductor. The low field contour has offsets from a tangent line to the first conductor on the low field contour. Each of the offsets increases a separation of the high voltage conductor from the low voltage conductor. A first offset, located from an end of the high voltage conductor, at a first lateral distance of 25 percent of the minimum separation, is 19 percent to 28 percent of the minimum separation. A second offset, located at a second lateral distance of 50 percent of the minimum separation, is 9 percent to 14 percent of the minimum separation. A third offset, located at a third lateral distance of 75 percent of the minimum separation, is 4 percent to 6 percent of the minimum separation. ## Claims ### Claim 1 A microelectronic device, comprising: a first conductor; a second conductor separated from the first conductor by a first lateral separation, the first lateral separation extending from a first straight tangent line that is tangent to the first conductor, to a second straight tangent line that is tangent to the second conductor, wherein: the first conductor has a first low field contour along a side facing the second conductor; the first straight tangent line is tangent to the first conductor on the first low field contour; the first low field contour has a first offset from the first straight tangent line, the first offset being located at a first lateral distance of 25 percent of the first lateral separation from a first end of the first conductor, the first offset being 19 percent to 28 percent of the first lateral separation; the first low field contour has a second offset from the first straight tangent line, the second offset being located at a second lateral distance of 50 percent of the first lateral separation from the first end of the first conductor, the second offset being 9 percent to 14 percent of the first lateral separation; and the first low field contour has a third offset from the first straight tangent line, the third offset being located at a third lateral distance of 75 percent of the first lateral separation from the first end of the first conductor, the third offset being 4 percent to 6 percent of the first lateral separation. ### Claim 2 (depends on 1) The microelectronic device of claim 1, wherein: the second conductor has a second low field contour along a side facing the first conductor; the second straight tangent line is tangent to the second conductor on the second low field contour; the second low field contour has a first offset from the second straight tangent line, the first offset being located at a first lateral distance of 25 percent of the first lateral separation from a first end of the second conductor, the first offset being 19 percent to 28 percent of the first lateral separation; the second low field contour has a second offset from the second straight tangent line, the second offset being located at a second lateral distance of 50 percent of the first lateral separation from the first end of the second conductor, the second offset being 9 percent to 14 percent of the first lateral separation; and the second low field contour has a third offset from the second straight tangent line, the third offset being located at a third lateral distance of 75 percent of the first lateral separation from the first end of the second conductor, the third offset being 4 percent to 6 percent of the first lateral separation. ### Claim 3 (depends on 2) The microelectronic device of claim 2, wherein the first end of the first conductor is aligned with the first end of the second conductor. ### Claim 4 (depends on 2) The microelectronic device of claim 2, wherein: the first low field contour has a fourth offset from the first straight tangent line, the fourth offset being located at a fourth lateral distance of 25 percent of the first lateral separation from a second end of the first conductor, the fourth offset being 19 percent to 28 percent of the first lateral separation; the first low field contour has a fifth offset from the first straight tangent line, the fifth offset being located at a fifth lateral distance of 50 percent of the first lateral separation from the second end of the first conductor, the fifth offset being 9 percent to 14 percent of the first lateral separation; and the first low field contour has a sixth offset from the first straight tangent line, the sixth offset being located at a sixth lateral distance of 75 percent of the first lateral separation from the second end of the first conductor, the sixth offset being 4 percent to 6 percent of the first lateral separation; the second low field contour has a fourth offset from the second straight tangent line, the fourth offset being located at a fourth lateral distance of 25 percent of the first lateral separation from a second end of the second conductor, the fourth offset being 19 percent to 28 percent of the first lateral separation; the second low field contour has a fifth offset from the second straight tangent line, the fifth offset being located at a fifth lateral distance of 50 percent of the first lateral separation from the second end of the second conductor, the fifth offset being 9 percent to 14 percent of the first lateral separation; and the second low field contour has a sixth offset from the second straight tangent line, the sixth offset being located at a sixth lateral distance of 75 percent of the first lateral separation from the second end of the second conductor, the sixth offset being 4 percent to 6 percent of the first lateral separation. ### Claim 5 (depends on 4) The microelectronic device of claim 4, wherein the second end of the first conductor is aligned with the second end of the second conductor. ### Claim 6 (depends on 1) The microelectronic device of claim 1, wherein: the first conductor has a first surface; and the second conductor has a second surface, the second surface being coplanar with the first surface. ### Claim 7 (depends on 1) The microelectronic device of claim 1, further comprising dielectric material between the first conductor and the second conductor. ### Claim 8 (depends on 1) The microelectronic device of claim 1, further comprising a third conductor separated from the first conductor by a second lateral separation, the second lateral separation extending from a third straight tangent line that is tangent to the first conductor, to a fourth straight tangent line that is tangent to the third conductor, wherein: the first conductor has a third low field contour along a side facing the third conductor; the third straight tangent line is tangent to the first conductor on the third low field contour; the third low field contour has a first offset from the third straight tangent line, the first offset being located at a first lateral distance of 25 percent of the second lateral separation from a third end of the first conductor, the first offset being 19 percent to 28 percent of the second lateral separation; the third low field contour has a second offset from the third straight tangent line, the second offset being located at a second lateral distance of 50 percent of the second lateral separation from the third end of the first conductor, the second offset being 9 percent to 14 percent of the second lateral separation; and the third low field contour has a third offset from the third straight tangent line, the third offset being located at a third lateral distance of 75 percent of the second lateral separation from the third end of the first conductor, the third offset being 4 percent to 6 percent of the second lateral separation. ### Claim 9 (depends on 8) The microelectronic device of claim 8, wherein: the third conductor has a fourth low field contour along a side facing the first conductor; the fourth straight tangent line is tangent to the third conductor on the fourth low field contour; the fourth low field contour has a first offset from the fourth straight tangent line, the first offset being located at a first lateral distance of 25 percent of the second lateral separation from a first end of the third conductor, the first offset being 19 percent to 28 percent of the second lateral separation; the fourth low field contour has a second offset from the fourth straight tangent line, the second offset being located at a second lateral distance of 50 percent of the second lateral separation from the first end of the third conductor, the second offset being 9 percent to 14 percent of the second lateral separation; and the fourth low field contour has a third offset from the fourth straight tangent line, the third offset being located at a third lateral distance of 75 percent of the second lateral separation from the first end of the third conductor, the third offset being 4 percent to 6 percent of the second lateral separation. ### Claim 10 (depends on 8) The microelectronic device of claim 8, further comprising a fourth conductor separated from the second conductor by a third lateral separation, wherein: the third lateral separation extends from a fifth straight tangent line that is tangent to the second conductor to a sixth straight tangent line that is tangent to the fourth conductor; the second conductor has a fifth low field contour along a side facing the fourth conductor; the fifth straight tangent line is tangent to the second conductor on the fifth low field contour; the fifth low field contour has a first offset from the fifth straight tangent line, the first offset being located at a first lateral distance of 25 percent of the third lateral separation from a third end of the second conductor, the first offset being 19 percent to 28 percent of the third lateral separation; the third low field contour has a second offset from the fifth straight tangent line, the second offset being located at a second lateral distance of 50 percent of the third lateral separation from the third end of the second conductor, the second offset being 9 percent to 14 percent of the third lateral separation; and the third low field contour has a third offset from the fifth straight tangent line, the third offset being located at a third lateral distance of 75 percent of the third lateral separation from the third end of the second conductor, the third offset being 4 percent to 6 percent of the third lateral separation. ### Claim 11 (depends on 10) The microelectronic device of claim 10, wherein: the fourth conductor has a sixth low field contour along a side facing the second conductor; the sixth straight tangent line is tangent to the fourth conductor on the sixth low field contour; the sixth low field contour has a first offset from the sixth straight tangent line, the first offset being located at a first lateral distance of 25 percent of the third lateral separation from a first end of the fourth conductor, the first offset being 19 percent to 28 percent of the third lateral separation; the sixth low field contour has a second offset from the sixth straight tangent line, the second offset being located at a second lateral distance of 50 percent of the third lateral separation from the first end of the fourth conductor, the second offset being 9 percent to 14 percent of the third lateral separation; and the sixth low field contour has a third offset from the sixth straight tangent line, the third offset being located at a third lateral distance of 75 percent of the third lateral separation from the first end of the fourth conductor, the third offset being 4 percent to 6 percent of the third lateral separation. ### Claim 12 (depends on 10) The microelectronic device of claim 10, wherein: the first conductor has a first surface; and the fourth conductor has a fourth surface, the fourth surface being coplanar with the first surface. ### Claim 13 (depends on 1) The microelectronic device of claim 1, wherein the first conductor is part of a lead frame of the microelectronic device. ### Claim 14 (depends on 13) The microelectronic device of claim 13, further comprising a first die attached to the first conductor. ### Claim 15 (depends on 13) The microelectronic device of claim 13, wherein the first conductor includes a tie bar. ### Claim 16 (depends on 13) The microelectronic device of claim 13, wherein the second conductor is part of the lead frame. ### Claim 17 (depends on 16) The microelectronic device of claim 16, further comprising a second die attached to the second conductor. ### Claim 18 (depends on 1) The microelectronic device of claim 1, wherein the first conductor and the second conductor are located in an interconnect region of the microelectronic device. ### Claim 19 (depends on 18) The microelectronic device of claim 18, wherein the first conductor and the second conductor are plates of a capacitor of the microelectronic device. ### Claim 20 (depends on 18) The microelectronic device of claim 18, wherein the first conductor and the second conductor are electrically coupled to active components of the microelectronic device.