# US 10,770,376 B2 · Semiconductor device, inverter unit and automobile > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,770,376 B2 - Document ID: US10770376B2 - Status: Granted - Kind: B2 - Application number: 16/317,716 - Filed: 2016-11-11 - Published: 2019-09-26 - Granted: 2020-09-08 - Earliest claimed: 2016-11-11 - Assignees: Mitsubishi Electric Corporation - Applicants: Mitsubishi Electric Corporation - Inventors: Yosuke Nakata; Yuji Imoto; Taishi Sasaki; Tatsuya Kawase - Web page: https://patentgrep.com/patent/US10770376B2 ## CPC - H10W 70/442: {of multiple leadframes in a single chip} - H10W 40/10: Arrangements for heating - H10W 40/255: {having a laminate or multilayered structure, e.g. direct bond copper [DBC] ceramic substrates} - H10W 70/427: {Bent parts} - H10W 70/435: {of insulating layers on leadframes, e.g. bridging members} - H10W 70/461: {specially adapted for cooling} - H10W 70/481: {for devices being provided for in groups H10D8/00 - H10D48/00} - H10W 72/00: Interconnections or connectors in packages - H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps - H10W 74/00: Encapsulations, e.g. protective coatings - H10W 74/111: {the semiconductor body being completely enclosed} - H10W 76/15: Containers comprising an insulating or insulated base - H10W 90/00: Package configurations - H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts} - H10W 90/811: {Multiple chips on leadframes} - H02M 7/003: {Constructional details, e.g. physical layout, assembly, wiring or busbar connections} - H10W 72/016: {of strap connectors} - H10W 72/07636: {Soldering or alloying} - H10W 72/352: {comprising metals or metalloids, e.g. solders} - H10W 72/631: {Shapes of strap connectors} - H10W 72/634: {Cross-sectional shape} - H10W 72/646: {the connected ends being on auxiliary connecting means on bond pads, e.g. on a bump connector} - H10W 72/652: {comprising metals or metalloids, e.g. silver} - H10W 72/871: {Bond wires and strap connectors} - H10W 72/884: {Die-attach connectors and bond wires} - H10W 72/886: {Die-attach connectors and strap connectors} - H10W 72/926: {Multiple bond pads having different sizes} - H10W 76/47: Solid or gel fillings - H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink} - H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W 90/763: {between laterally-adjacent chips} - H10W 90/764: {between a chip and a stacked insulating package substrate, interposer or RDL} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P) ## Abstract A semiconductor chip (2a) is bonded to an upper surface of the conductive substrate (1a). A control terminal (11a) is disposed outside the semiconductor chip (2a) and connected to a control electrode of the semiconductor chip (2a) via a lead (12a). A case (10) surrounds the semiconductor chip (2a). A sealing material (13) seals the semiconductor chip (2a). The lead frame (4) includes a bonded part (4a) joined to the semiconductor chip (2a), and an upright part (4b) embedded in the case (10), extending from the bonded part (4a) to an outer side of the control terminal (11a), and standing upright vertically relative to an upper surface of the semiconductor chip (2a). ## Claims ### Claim 1 A semiconductor device comprising: a conductive substrate; at least one semiconductor chip bonded to an upper surface of the conductive substrate; a control terminal disposed outside the semiconductor chip and connected to a control electrode of the semiconductor chip via a lead; a case surrounding the semiconductor chip; at least one lead frame; and a sealing material sealing the semiconductor chip, wherein the lead frame includes a bonded part joined to the semiconductor chip, and an upright part embedded in the case, extending from the bonded part to an outer side of the control terminal, and standing upright vertically relative to an upper surface of the semiconductor chip, and at least part of the upright part is formed inside of the control terminal. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, wherein the upright part is formed from inside to outside of the control terminal. ### Claim 3 (depends on 1) The semiconductor device according to claim 1, wherein the lead frame includes a stress reducing part connecting the bonded part and the upright part and reducing stress applied to the semiconductor chip. ### Claim 4 (depends on 1) The semiconductor device according to claim 1, wherein the at least one semiconductor chip includes a first semiconductor chip forming an upper arm and a second semiconductor chip forming a lower arm, the at least one lead frame includes a first lead frame electrically connected to the first semiconductor chip and a second lead frame electrically connected to the second semiconductor chip, and the upright part of the first lead frame and the upright part of the second lead frame face each other via an insulating layer. ### Claim 5 (depends on 1) The semiconductor device according to claim 1, wherein the lead frame is integrated with the case. ### Claim 6 (depends on 1) The semiconductor device according to claim 1, wherein the lead frame is fitted to the case. ### Claim 7 (depends on 1) The semiconductor device according to claim 1, wherein the upright part of the lead frame is bent in a U-shape. ### Claim 8 (depends on 1) The semiconductor device according to claim 1, wherein the at least one semiconductor chip includes a plurality of semiconductor chips connected in parallel for one switching phase, and the lead frame draws one AC output from the plurality of semiconductor chips. ### Claim 9 (depends on 1) The semiconductor device according to claim 1, further comprising an insulating substrate provided on an underside of the conductive substrate. ### Claim 10 (depends on 9) The semiconductor device according to claim 9, further comprising a cooling plate provided on an underside of the insulating substrate. ### Claim 11 (depends on 10) The semiconductor device according to claim 10, further comprising a plurality of protrusions provided on an underside of the cooling plate for cooling purposes. ### Claim 12 (depends on 10) The semiconductor device according to claim 10, wherein the cooling plate is thermally coupled to a cooling fin via heat dissipation grease. ### Claim 13 (depends on 1) The semiconductor device according to claim 1, wherein the lead frame is covered by the sealing material. ### Claim 14 (depends on 1) The semiconductor device according to claim 1, wherein the at least one semiconductor chip includes a wide band gap semiconductor having a bandgap wider than a bandgap of silicon. ### Claim 15 (depends on 1) An inverter unit comprising the semiconductor device according to claim 1 and installed in an automobile housing as a power source for driving an automobile motor. ### Claim 16 An automobile comprising: an inverter unit installed in a housing of the automobile as a power source for driving a motor of the automobile, the inverter unit including a semiconductor device comprising: a conductive substrate; at least one semiconductor chip bonded to an upper surface of the conductive substrate; a control terminal disposed outside the semiconductor chip and connected to a control electrode of the semiconductor chip via a lead; a case surrounding the semiconductor chip; at least one lead frame; and a sealing material sealing the semiconductor chip, wherein the lead frame includes a bonded part joined to the semiconductor chip, and an upright part embedded in the case, extending from the bonded part to an outer side of the control terminal, and standing upright vertically relative to an upper surface of the semiconductor chip, and at least part of the upright part is formed inside of the control terminal.