# US 10,770,369 B2 · Semiconductor device package

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- Number: US 10,770,369 B2
- Document ID: US10770369B2
- Status: Granted
- Kind: B2
- Application number: 16/112,248
- Filed: 2018-08-24
- Published: 2020-02-27
- Granted: 2020-09-08
- Earliest claimed: 2018-08-24
- Assignees: Advanced Semiconductor Engineering, Inc.
- Applicants: Advanced Semiconductor Engineering, Inc.
- Inventors: Chih-Pin Hung; Tang-Yuan Chen; Jin-Feng Yang; Meng-Kai Shih
- Web page: https://patentgrep.com/patent/US10770369B2

## CPC

- H10W 40/22: characterised by their shape, e.g. having conical or cylindrical projections
- H10W 40/00: Arrangements for thermal protection or thermal control (integrated devices comprising arrangements for thermal protection H10D89/60)
- H10W 70/611: {for connecting multiple chips together}
- H10W 70/635: {Through-vias}
- H10W 70/65: Shapes or dispositions of interconnections
- H10W 76/153: having interconnections in passages through the insulating or insulated base
- H10W 76/60: Seals
- H10W 72/072: {of bump connectors}
- H10W 72/073: {of die-attach connectors}
- H10W 72/07338: {hardening the adhesive by curing, e.g. thermosetting}
- H10W 72/07353: {changes in shapes}
- H10W 72/07354: {changes in dispositions}
- H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu}
- H10W 72/30: Die-attach connectors
- H10W 72/334: {Cross-sectional shape, i.e. in side view}
- H10W 72/347: {Dispositions of multiple die-attach connectors}
- H10W 72/877: {Bump connectors and die-attach connectors}
- H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills
- H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts}
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/734: {between a chip and a stacked insulating package substrate, interposer or RDL}
- H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor device package includes a substrate, a first electronic component, a second electronic component, a heat dissipation lid and a thermal isolation. The substrate has a surface. The first electronic component and the second electronic component are over the surface of the substrate and arranged along a direction substantially parallel to the surface. The first electronic component and the second electronic component are separated by a space therebetween. The heat dissipation lid is over the first electronic component and the second electronic component. The heat dissipation lid defines one or more apertures at least over the space between the first electronic component and the second electronic component. The thermal isolation is in the one or more apertures of the heat dissipation lid.

## Claims

### Claim 1

A semiconductor device package, comprising:
a substrate having a surface;
a first electronic component and a second electronic component disposed over the surface of the substrate and arranged along a direction substantially parallel to the surface, wherein the first electronic component and the second electronic component are separated by a space therebetween;
a heat dissipation lid disposed over the first electronic component and the second electronic component, wherein the heat dissipation lid defines one or more apertures at least over the space between the first electronic component and the second electronic component; and
a thermal isolation disposed in the one or more apertures of the heat dissipation lid,
wherein the one or more apertures includes a first aperture over the space between the first electronic component and the second electronic component, and one or more second apertures over at least one of the first electronic component or the second electronic component, and the first aperture is distinct from the one or more second apertures, wherein the first aperture partially overlaps an edge of the first electronic component and an edge of the second electronic component.

### Claim 2 (depends on 1)

The semiconductor device package of claim 1, wherein a thermal conductivity of the heat dissipation lid is higher than a thermal conductivity of the thermal isolation.

### Claim 3 (depends on 2)

The semiconductor device package of claim 2, wherein a ratio of the thermal conductivity of the heat dissipation lid to the thermal conductivity of the thermal isolation is higher than 30.

### Claim 4 (depends on 1)

The semiconductor device package of claim 1, wherein an aperture ratio of an area of the one or more apertures to an area of the heat dissipation lid substantially ranges from about 8% to about 53%.

### Claim 5 (depends on 4)

The semiconductor device package of claim 4, wherein the aperture ratio of the area of the one or more apertures to the area of the heat dissipation lid substantially ranges from about 8% to about 46%.

### Claim 6 (depends on 4)

The semiconductor device package of claim 4, wherein the aperture ratio of the area of the one or more apertures to the area of the heat dissipation lid substantially ranges from about 31% to about 53%.

### Claim 7 (depends on 4)

The semiconductor device package of claim 4, wherein the aperture ratio of the area of the one or more apertures to the area of the heat dissipation lid substantially ranges from about 31% to about 46%.

### Claim 8 (depends on 1)

The semiconductor device package of claim 1, wherein the heat dissipation lid is in contact with the first electronic component and the second electronic component.

### Claim 9 (depends on 1)

The semiconductor device package of claim 1, wherein the heat dissipation lid is separated from the first electronic component and the second electronic component.

### Claim 10 (depends on 9)

The semiconductor device package of claim 9, wherein a gap between the heat dissipation lid and the first electronic component/the second electronic component and measured in a second direction perpendicular to the surface of the substrate ranges from about 1 micrometer to about 200 micrometers.

### Claim 11 (depends on 1)

The semiconductor device package of claim 1, wherein the thermal isolation comprises a gas state thermal isolation, a solid state thermal isolation, a vacuum thermal isolation, or a combination thereof.

### Claim 12 (depends on 1)

The semiconductor device package of claim 1, wherein the heat dissipation lid includes a bottom surface facing the first electronic component and the second electronic component, and an upper surface opposite to the bottom surface, and the thermal isolation further covers at least a portion of the upper surface of the heat dissipation lid.

### Claim 13 (depends on 1)

The semiconductor device package of claim 1, further comprising a first thermal interface material between the heat dissipation lid and the first electronic component, and between the heat dissipation lid and the second electronic component.

### Claim 14 (depends on 1)

The semiconductor device package of claim 1, further comprising a second thermal interface material over the heat dissipation lid and the thermal isolation.

### Claim 15 (depends on 14)

The semiconductor device package of claim 14, further comprising a heat sink over the second thermal interface material.

### Claim 16

A semiconductor device package, comprising:
a substrate having a surface;
a plurality of electronic components disposed over the surface of the substrate, wherein at least two adjacent electronic components are separated by a space;
a heat dissipation lid disposed over the electronic components, wherein the heat dissipation lid defines one or more apertures, wherein the one or more apertures includes a first aperture over the space, and one or more second apertures over at least one of the electronic components, and the first aperture is physically distinct from the one or more second apertures; and
a thermal isolation disposed in the one or more apertures of the heat dissipation lid, wherein a ratio of a thermal conductivity of the heat dissipation lid to a thermal conductivity of the thermal isolation is higher than 30.