# US 10,770,356 B2 · Contact structure and method of fabricating the same

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 10,770,356 B2
- Document ID: US10770356B2
- Status: Granted
- Kind: B2
- Application number: 16/016,962
- Filed: 2018-06-25
- Published: 2018-10-25
- Granted: 2020-09-08
- Earliest claimed: 2016-11-29
- Assignees: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicants: Taiwan Semiconductor Manufacturing Company, Ltd.
- Inventors: Wan Hsuan Hsu; I-Hsiu Wang; Yean-Zhaw Chen; Cheng-Wei Chang; Yu Shih Wang; Hsin-Yan Lu; Yi-Wei Chiu
- Web page: https://patentgrep.com/patent/US10770356B2

## CPC

- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10D 30/0212: {using self-aligned silicidation}
- H10D 30/60: Insulated-gate field-effect transistors [IGFET] (H10D30/40 takes precedence)
- H10D 30/6219: {characterised by the source or drain electrodes}
- H10D 62/151: {of IGFETs (of IGFETs having LDD or DDD structure H10D30/601; of thin film transistors H10D30/6713)}
- H10D 64/251: {Source or drain electrodes for field-effect devices}
- H10D 64/257: {for lateral devices wherein the source or drain electrodes are characterised by top-view geometrical layouts, e.g. interdigitated, semi-circular, annular or L-shaped electrodes (source or drain electrodes of TFTs H10D30/673)}
- H10D 64/258: {characterised by the relative positions of the source or drain electrodes with respect to the gate electrode}
- H10D 64/259: {Source or drain electrodes being self-aligned with the gate electrode and having bottom surfaces higher than the interface between the channel and the gate dielectric}
- H10D 84/0147: {Manufacturing their gate sidewall spacers}
- H10D 84/0149: {Manufacturing their interconnections or electrodes, e.g. source or drain electrodes}
- H10D 84/8316: {the IGFETs characterised by having gate sidewall spacers specially adapted for integration}
- H10D 89/10: Integrated device layouts
- H10P 14/69391: {the material containing aluminium, e.g. Al2O3}
- H10P 14/69433: {the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz}
- H10P 50/283: {by chemical means}
- H10P 50/73: {using masks for insulating materials}
- H10P 76/2041: {Photolithographic processes}
- H10W 20/056: {by filling conductive material into holes, grooves or trenches}
- H10W 20/069: {by forming self-aligned vias or self-aligned contact plugs}
- H10W 20/081: {by forming openings in the dielectric parts}
- H10W 20/082: {the openings being tapered via holes}
- H10D 84/0133: {Manufacturing common source or drain regions between multiple IGFETs}
- H10D 84/83: of only insulated-gate FETs [IGFET]
- H10D 84/83125: {the IGFETs characterised by having shared source or drain regions}
- H10W 20/074: {of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

An apparatus includes a first source and a common drain and on opposite sides of a first gate surrounded by a first gate spacer, a second source and the common drain on opposite sides of a second gate surrounded by a second gate spacer, a first protection layer formed along a sidewall of the first gate spacer, wherein a top surface of the first protection layer has a first slope, a second protection layer formed along a sidewall of the second gate spacer, wherein a top surface of the second protection layer has a second slope, a lower drain contact between the first gate and the second gate and an upper drain contact over the lower drain contact and between the first gate and the second gate, wherein at least a portion of the upper drain contact is in contact with the first slope and the second slope.

## Claims

### Claim 1

An apparatus comprising:
a first source and a common drain in a substrate and on opposite sides of a first gate, the first gate being surrounded by a first gate spacer;
a second source and the common drain in the substrate and on opposite sides of a second gate, the second gate being surrounded by a second gate spacer;
a first protection layer formed along a sidewall of the first gate spacer, wherein a top surface of the first protection layer has a first slope;
a second protection layer formed along a sidewall of the second gate spacer, wherein a top surface of the second protection layer has a second slope;
a lower drain contact between the first gate and the second gate, the lower drain contact has an inverted-trapezoidal shape; and
an upper drain contact over the lower drain contact and between the first gate and the second gate, wherein at least a portion of the upper drain contact is in contact with the first slope and the second slope.

### Claim 2 (depends on 1)

The apparatus of claim 1, wherein:
a sidewall of the first protection layer is vertically aligned with a first sidewall of the common drain.

### Claim 3 (depends on 1)

The apparatus of claim 1, wherein:
a sidewall of the second protection layer is vertically aligned with a second sidewall of the common drain.

### Claim 4 (depends on 1)

The apparatus of claim 1, wherein:
the first slope extends downward from an edge of a top surface of a sidewall of the first gate spacer; and
the second slope extends downward from an edge of a top surface of a sidewall of the second gate spacer.

### Claim 5 (depends on 1)

The apparatus of claim 1, wherein:
the first gate, the second gate, the lower drain contact and the upper drain contact are in an interlayer dielectric layer over the substrate.

### Claim 6 (depends on 5)

The apparatus of claim 5, further comprising:
an etch stop layer over the interlayer dielectric layer, wherein the etch stop layer is formed of aluminum oxynitride.

### Claim 7 (depends on 6)

The apparatus of claim 6, further comprising:
a dielectric layer over and in contact with the etch stop layer over.

### Claim 8 (depends on 7)

The apparatus of claim 7, wherein:
the upper drain contact includes a first portion having an inverted-trapezoidal shape and a second portion having a rectangular shape.

### Claim 9 (depends on 8)

The apparatus of claim 8, wherein:
the first portion of the upper drain contact is in the interlayer dielectric layer and between the first gate and the second gate; and
the second portion of the upper drain contact extends through the etch stop layer and the dielectric layer.

### Claim 10 (depends on 1)

The apparatus of claim 1, wherein the first protection layer extends no higher than an upper surface of the first gate spacer.

### Claim 11

A device comprising:
a first drain/source region and a second drain/source region in a substrate and on opposite sides of a first gate, wherein the second drain/source region and the first gate are separated by a first gate spacer;
a third drain/source region and the second drain/source region in the substrate and on opposite sides of a second gate, wherein the second drain/source region and the second gate are separated by a second gate spacer;
a dielectric layer on the substrate, wherein an upper surface of the first gate, an upper surface of the second gate, and an upper surface of the dielectric layer are level;
a first protection layer formed along a sidewall of the first gate spacer, wherein the first protection layer is over the second drain/source region, wherein a first width of the first protection layer along a direction parallel to the upper surface of the dielectric layer decreases as the first protection layer extends away from the second drain/source region;
a second protection layer formed along a sidewall of the second gate spacer, wherein the second protection layer is over the second drain/source region;
a lower drain contact between the first protection layer and the second protection layer; and
an upper drain contact over the lower drain contact and between the first gate and the second gate, wherein a width of the upper drain contact is greater than a width of the lower drain contact.

### Claim 12 (depends on 11)

The device of claim 11, further comprising:
a top surface of the first protection layer has a first slope; and
a top surface of the second protection layer has a second slope.

### Claim 13 (depends on 12)

The device of claim 12, wherein:
the first slope extends downward from an edge of a top surface of a sidewall of the first gate spacer; and
the second slope extends downward from an edge of a top surface of a sidewall of the second gate spacer.

### Claim 14 (depends on 11)

The device of claim 11, wherein:
the first drain/source region is a source of a first transistor;
the third drain/source region is a source of a second transistor; and
the second drain/source region is a drain shared by the first transistor and the second transistor.

### Claim 15 (depends on 11)

The device of claim 11, further comprising:
an etch stop layer over the first gate and the second gate; and
a dielectric layer over the etch stop layer.

### Claim 16

An apparatus comprising:
a first source and a common drain on opposite sides of a first gate;
a second source and the common drain on opposite sides of a second gate, wherein:
the first gate and the second gate are in an interlayer dielectric layer over a substrate; and
the first gate and the second gate are surrounded by a first gate spacer and a second gate spacer respectively;
a first protection layer formed along a sidewall of the first gate spacer, wherein the first protection layer is over the common drain and a top surface of the first protection layer has a first slope, the first protection layer extending no higher than an upper surface of the first gate spacer;
a second protection layer formed along a sidewall of the second gate spacer, wherein the second protection layer is over the common drain and a top surface of the second protection layer has a second slope; and
a first drain contact formed between the first gate and the second gate, wherein a width of an upper portion of the first drain contact is greater than a width of a lower portion of the first drain contact, the first drain contact completely covers the first protection layer in a cross-section view extending between the first gate and the second gate.

### Claim 17 (depends on 16)

The apparatus of claim 16, further comprising:
a second drain contact formed between the common drain and the first drain contact, wherein the second drain contact has an inverted-trapezoidal shape.

### Claim 18 (depends on 16)

The apparatus of claim 16, wherein:
a rate of change of the top surface of the first protection layer is substantially equal to a rate of change of the top surface of the second protection layer.

### Claim 19 (depends on 16)

The apparatus of claim 16, wherein:
the upper portion of the first drain contact has a rectangular shape; and
the lower portion of the first drain contact has an inverted-trapezoidal shape, and wherein:
the lower portion of the first drain contact is in contact with the first slope and the second slope;
a first edge of the upper portion of the first drain contact is vertically aligned with an outermost edge of the first gate spacer; and
a second edge of the upper portion of the first drain contact is vertically aligned with an outermost edge of the second gate spacer.

### Claim 20 (depends on 19)

The apparatus of claim 19, wherein:
a ratio of a width of the upper portion of the first drain contact to a minimum distance between the first protection layer and the second protection layer is in a range from about 1.1 to about 1.3.