# US 10,770,341 B2 · Method for manufacturing semiconductor device

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- Number: US 10,770,341 B2
- Document ID: US10770341B2
- Status: Granted
- Kind: B2
- Application number: 16/137,823
- Filed: 2018-09-21
- Published: 2019-09-26
- Granted: 2020-09-08
- Earliest claimed: 2018-03-23
- Assignees: Kabushiki Kaisha Toshiba; Toshiba Electronic Devices & Storage Corporation
- Applicants: Kabushiki Kaisha Toshiba; Toshiba Electronic Devices & Storage Corporation
- Inventors: Takahito Nakajima; Shinya Ito
- Web page: https://patentgrep.com/patent/US10770341B2

## CPC

- H10W 10/014: {using trench refilling with dielectric materials, e.g. shallow trench isolations}
- H10D 84/0151: {Manufacturing their isolation regions}
- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10P 14/6334: {using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition (deposition by physical ablation of a target H10P14/6329)}
- H10P 14/6336: {in the presence of a plasma [PECVD]}
- H10P 14/6529: {by exposure to a gas or vapour}
- H10P 14/6681: {the precursor containing a compound comprising Si}
- H10P 14/69215: {the material being a silicon oxide, e.g. SiO2}
- H10P 14/69433: {the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz}
- H10P 50/242: {of Group IV materials}
- H10P 50/283: {by chemical means}
- H10P 50/692: {characterised by their composition, e.g. multilayer masks or materials}
- H10P 50/695: {characterised by the process involved to create the mask, e.g. lift-off masks or sidewalls or to modify the mask}
- H10P 95/062: {involving a dielectric removal step}
- H10W 10/17: formed using trench refilling with dielectric materials, e.g. shallow trench isolations
- H10D 84/0135: {Manufacturing their gate conductors}
- H10D 84/0144: {Manufacturing their gate insulating layers}
- H10P 14/43: Chemical deposition, e.g. chemical vapour deposition [CVD]
- H10P 50/267: {using plasmas}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A method for manufacturing a semiconductor device according to an embodiment includes forming a first insulating film on a semiconductor substrate, the first insulating film being patterned; forming a trench in the semiconductor substrate using the first insulating film as a mask; depositing a second insulating film in the trench and on the first insulating film; removing the second insulating film on the first insulating film using a CMP method; removing a portion of the first insulating film; removing a portion of the second insulating film using isotropic etching; and removing a remaining portion of the first insulating film.

## Claims

### Claim 1

A method for manufacturing a semiconductor device, comprising:
forming a first insulating film on a semiconductor substrate, the first insulating film being patterned;
forming a trench in the semiconductor substrate using the first insulating film as a mask;
depositing a second insulating film in the trench and on the first insulating film;
depositing a third insulating film on the second insulating film;
removing the second insulating film and the third insulating film on the first insulating film using a CMP method;
removing a portion of the second insulating film and a portion of the third insulating film using isotropic etching; and
removing the first insulating film, wherein an etching rate of the third insulating film during the isotropic etching is lower than an etching rate of the second insulating film.

### Claim 2 (depends on 1)

The method for manufacturing a semiconductor device according to claim 1, wherein a deposition thickness of the third insulating film is greater than a deposition thickness of the second insulating film.

### Claim 3 (depends on 1)

The method for manufacturing a semiconductor device according to claim 1, wherein, in the removing the portion of the second insulating film and the portion of the third insulating film by the isotropic etching, a thickness of at least portions of the second insulating film and the third insulating film remaining in the trench is greater than a depth of the trench.

### Claim 4 (depends on 1)

The method for manufacturing a semiconductor device according to claim 1, wherein the first insulating film is made of silicon nitride and the second insulating film and the third insulating film are made of silicon oxide.