# US 10,770,167 B1 · Memory storage apparatus and forming method of resistive memory device thereof

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- Number: US 10,770,167 B1
- Document ID: US10770167B1
- Status: Granted
- Kind: B1
- Application number: 16/281,063
- Filed: 2019-02-20
- Published: 2020-08-20
- Granted: 2020-09-08
- Earliest claimed: 2019-02-20
- Assignees: Winbond Electronics Corp.
- Applicants: Winbond Electronics Corp.
- Inventors: Ping-Kun Wang; Ming-Che Lin; Chien-Min Wu; He-Hsuan Chao; Chih-Cheng Fu; Shao-Ching Liao
- Web page: https://patentgrep.com/patent/US10770167B1

## CPC

- G11C 29/50016: {of retention}
- G11C 13/0035: {Evaluating degradation, retention or wearout, e.g. by counting writing cycles}
- G11C 13/0038: {Power supply circuits}
- G11C 13/004: {Reading or sensing circuits or methods}
- G11C 13/0069: {Writing or programming circuits or methods}
- G11C 29/021: {in voltage or current generators}
- G11C 29/12005: {comprising voltage or current generators}
- G11C 29/24: Accessing extra cells, e.g. dummy cells or redundant cells
- G11C 29/50: Marginal testing, e.g. race, voltage or current testing
- G11C 2013/0045: {Read using current through the cell}
- G11C 2013/0083: {Write to perform initialising, forming process, electro forming or conditioning}
- G11C 2029/5004: {Voltage}
- G11C 2029/5006: {Current}
- G11C: STATIC STORES (semiconductor memory devices H10B)

## Abstract

A memory storage apparatus and a forming method of a resistive memory device thereof are provided. A test forming voltage is applied to a redundant resistive memory device and a corresponding test current is read. A forming voltage applied to a main memory cell block is determined according to the test forming voltage, the test current, a forming current-voltage characteristic data and a target forming current.

## Claims

### Claim 1

A memory storage apparatus, comprising:
a memory cell array, comprising:
a main memory cell block, comprising a plurality of resistive memory devices arranged in an array; and
a redundant memory cell block, comprising a plurality of redundant resistive memory devices arranged in an array; and
a memory control circuit, coupled to the memory cell array, applying a test forming voltage to at least one redundant resistive memory device, reading a corresponding test current, and determining a forming voltage applied to the main memory cell block according to the test forming voltage, the test current, a forming current-voltage characteristic data and a target forming current.

### Claim 2 (depends on 1)

The memory storage apparatus according to claim 1, wherein the memory control circuit comprises:
a forming control circuit;
a forming voltage generator, coupled to the forming control circuit and the memory array, and controlled by the forming control circuit to generate the test forming voltage and the forming voltage; and
a forming current sense circuit, coupled to the forming control circuit and the memory array, and reading the test current to generate a test current signal to the forming control circuit, wherein the forming control circuit determines the forming voltage according to the test forming voltage, the test current signal, the forming current-voltage characteristic data and the target forming current, and controls the forming voltage generator to apply the forming voltage to the main memory cell block.

### Claim 3 (depends on 1)

The memory storage apparatus according to claim 1 wherein the forming current-voltage characteristic data comprises a forming current-voltage characteristic curve or a forming current-voltage characteristic look-up table, and the forming current-voltage characteristic look-up table indicates the forming voltage corresponding to the test forming voltage and the test current signal for reaching the target forming current.

### Claim 4 (depends on 3)

The memory storage apparatus according to claim 3, wherein the forming current-voltage characteristic curve is a straight line having a preset slope.

### Claim 5 (depends on 2)

The memory storage apparatus according to claim 2, wherein the forming current-voltage characteristic data comprises a forming current-voltage characteristic curve or a forming current-voltage characteristic look-up table, and the forming current-voltage characteristic look-up table indicates the forming voltage corresponding to the test forming voltage and the test current signal for reaching the target forming current.

### Claim 6 (depends on 5)

The memory storage apparatus according to claim 5, wherein the forming current-voltage characteristic curve is a straight line having a preset slope.

### Claim 7 (depends on 1)

The memory storage apparatus according to claim 1, wherein the test forming voltage comprises a gate voltage and a drain voltage.

### Claim 8 (depends on 1)

The memory storage apparatus according to claim 1, wherein the memory control circuit further determines the forming voltage applied to the main memory cell block according to a median current value of the test current corresponding to the at least one redundant resistive memory device.

### Claim 9

A forming method of a resistive memory device of a memory storage apparatus, the memory storage apparatus comprising a memory array, the memory cell array comprising a main memory cell block and a redundant memory cell block, the forming method of the resistive memory device comprising:
applying a test forming voltage to at least one redundant resistive memory device and reading a corresponding test current;
determining a forming voltage applied to the main memory cell block according to the test forming voltage, the test current, a forming current-voltage characteristic data and a target forming current; and
applying the forming voltage to the main memory cell block.

### Claim 10 (depends on 9)

The memory storage apparatus according to claim 9, wherein the forming current-voltage characteristic data comprises a forming current-voltage characteristic curve or a forming current-voltage characteristic look-up table, and the forming current-voltage characteristic look-up table indicates the forming voltage corresponding to the test forming voltage and the test current signal for reaching the target forming current.

### Claim 11 (depends on 10)

The forming method of the resistive memory device according to claim 10, wherein the forming current-voltage characteristic curve is a straight line having a preset slope.

### Claim 12 (depends on 9)

The forming method of the resistive memory device according to claim 9, wherein the test forming voltage comprises a gate voltage and a drain voltage.

### Claim 13 (depends on 9)

The forming method of the resistive memory device according to claim 9, further comprising:
determining the forming voltage applied to the main memory cell block according to a median current value of the test current corresponding to the at least one redundant resistive memory device.