# US 10,770,128 B2 · Non volatile mass storage device with improved refresh algorithm > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 10,770,128 B2 - Document ID: US10770128B2 - Status: Granted - Kind: B2 - Application number: 16/147,446 - Filed: 2018-09-28 - Published: 2019-02-07 - Granted: 2020-09-08 - Earliest claimed: 2018-09-28 - Assignees: Intel Corporation - Applicants: Intel Corporation - Inventors: Mark Anthony Golez; David J. Pelster; Xin Guo; Paul D. Ruby - Web page: https://patentgrep.com/patent/US10770128B2 ## CPC - G11C 11/40611: {External triggering or timing of internal or partially internal refresh operations, e.g. auto-refresh or CAS-before-RAS triggered refresh} - G11C 11/40603: {Arbitration, priority and concurrent access to memory cells for read/write or refresh operations} - G11C 11/40618: {Refresh operations over multiple banks or interleaving} - G11C 13/0023: {Address circuits or decoders} - G11C 13/0033: {Disturbance prevention or evaluation; Refreshing of disturbed memory data} - G11C 13/0061: {Timing circuits or methods} - G11C 16/08: Address circuits; Decoders; Word-line control circuits - G11C 16/32: Timing circuits - G11C 16/3418: {Disturbance prevention or evaluation; Refreshing of disturbed memory data} - G11C 16/349: {Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles} - G11C 8/12: Group selection circuits, e.g. for memory block selection, chip selection, array selection - G11C 2211/4063: Interleaved refresh operations - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract A refreshing method is described. The method includes recognizing a set of blocks of a non-volatile memory for refreshing and then refreshing a subset of the data within the blocks, where, invalid data within the blocks is not recognized for refreshing and a group of blocks whose oldest data has not aged for a pre-set time period is not recognized for refreshing. ## Claims ### Claim 1 An apparatus, comprising: a controller to implement a non-volatile memory refresh algorithm, the controller comprising logic circuitry to recognize a set of blocks of the non-volatile memory for refreshing and then refresh only a subset of data stored within the set of blocks, where, invalid data is not recognized for refreshing and a group of blocks whose oldest data has not aged for a pre-set time period is not recognized for refreshing. ### Claim 2 (depends on 1) The apparatus of claim 1 wherein blocks of a same band are grouped together for recognition of refreshing and wherein valid data of the blocks within the same band are refreshed over time as a unit. ### Claim 3 (depends on 2) The apparatus of claim 2 wherein a next band's blocks do not begin to be refreshed until a previous band's blocks have been fully refreshed. ### Claim 4 (depends on 1) The apparatus of claim 1 wherein data invalidity/validity is tracked at a granularity that is less than or equal to a block. ### Claim 5 (depends on 1) The apparatus of claim 1 wherein the pre-set time period is programmable. ### Claim 6 (depends on 1) The apparatus of claim 1 wherein the non-volatile memory refresh algorithm determines a refresh rate as an amount of valid data recognized for refresh normalized by an expiration time less the pre-set time period. ### Claim 7 (depends on 6) The apparatus of claim 6 wherein the non-volatile memory refresh algorithm determines respective refresh rates for multiple bands having blocks recognized for refresh and combines the respective refresh rates to determine a refresh rate to be applied to a particular one of the multiple bands. ### Claim 8 (depends on 1) The apparatus of claim 1 wherein the controller is to persist, as part of a power down process of a non-volatile mass storage device, any of: a hold-off period; a maximum permitted time window without refresh; and, timer values for different groups of blocks. ### Claim 9 (depends on 1) The apparatus of claim 1 wherein more than one group of blocks whose ageing is tracked as a single unit are concurrently refreshed. ### Claim 10 A computing system, comprising: a plurality of processing cores; a system memory; a memory controller disposed between the system memory and the plurality of processing cores; a peripheral controller coupled to the memory controller; a non volatile mass storage device comprising a controller to implement a non-volatile memory refresh algorithm, the controller comprising logic circuitry to recognize a set of blocks of the non-volatile memory for refreshing and then refresh only a subset of data stored within the set of blocks, where, invalid data is not recognized for refreshing and a group of blocks whose oldest data has not aged for a pre-set time period is not recognized for refreshing. ### Claim 11 (depends on 10) The computing system of claim 10 wherein blocks of a same band are grouped together for recognition of refreshing and wherein valid data of the blocks within the same band are refreshed over time as a unit. ### Claim 12 (depends on 11) The computing system of claim 11 wherein a next band's blocks do not begin to be refreshed until a previous band's blocks have been fully refreshed. ### Claim 13 (depends on 10) The computing system of claim 10 wherein data invalidity/validity is tracked at a granularity that is less than or equal to a block. ### Claim 14 (depends on 10) The computing system of claim 10 wherein the pre-set time period is programmable. ### Claim 15 (depends on 10) The computing system of claim 10 wherein the non-volatile memory refresh algorithm determines a refresh rate as an amount of valid data recognized for refresh normalized by an expiration time less the pre-set time period. ### Claim 16 A machine readable medium having stored thereon instructions that when processed by a processor causes a refresh method to be performed, the refresh method comprising: recognizing a set of blocks of a non-volatile memory for refreshing and then refreshing a subset of data within the set of blocks, where, invalid data within the set of blocks is not recognized for refreshing and a group of blocks whose oldest data has not aged for a pre-set time period is not recognized for refreshing. ### Claim 17 (depends on 16) The machine readable medium of claim 16 further comprising grouping blocks of a same band together for recognition of refreshing and refreshing valid data within the blocks of the same band over time as a unit. ### Claim 18 (depends on 17) The machine readable medium of claim 17 further comprising not beginning to refresh a next band's blocks until a previous band's blocks have been fully refreshed. ### Claim 19 (depends on 16) The machine readable medium of claim 16 wherein the method further comprises persisting, as part of a power down process of a non-volatile mass storage device, any of: a hold-off period; a maximum permitted time window without refresh; and, timer values for different groups of blocks. ### Claim 20 (depends on 16) The machine readable medium of claim 16 wherein the pre-set time period is programmable. ### Claim 21 (depends on 16) The machine readable medium of claim 16 wherein the method further comprises determining a refresh rate as a number of blocks recognized for refresh normalized by an expiration time less the pre-set time period. ### Claim 22 (depends on 16) The machine readable medium of claim 16 wherein more than one group of blocks whose ageing is tracked as a single unit are concurrently refreshed.